Dhruva Acharyya

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2007
4EERouwaida Kanj, Rajiv V. Joshi, Jayakumaran Sivagnaname, Jente B. Kuang, Dhruva Acharyya, Tuyet Nguyen, Chandler McDowell, Sani R. Nassif: Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs. ISQED 2007: 33-40
2006
3EEJim Plusquellic, Dhruva Acharyya, Abhishek Singh, Mohammad Tehranipoor, Chintan Patel: Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method. IEEE Design & Test of Computers 23(4): 278-293 (2006)
2005
2EEDhruva Acharyya, Jim Plusquellic: Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements. VTS 2005: 433-438
2003
1EEDhruva Acharyya, Jim Plusquellic: Impedance Profile of a Commercial Power Grid and Test System. ITC 2003: 709-718

Coauthor Index

1Rajiv V. Joshi [4]
2Rouwaida Kanj [4]
3Jente B. Kuang [4]
4Chandler McDowell [4]
5Sani R. Nassif [4]
6Tuyet Nguyen [4]
7Chintan Patel [3]
8James F. Plusquellic (Jim Plusquellic) [1] [2] [3]
9Abhishek Singh [3]
10Jayakumaran Sivagnaname [4]
11Mohammad Tehranipoor [3]

Colors in the list of coauthors

Copyright © Fri Nov 21 17:05:01 2008 by Michael Ley (ley@uni-trier.de)