Adnan Aziz

2008
70	EE	Stephen Bijansky, Adnan Aziz: TuneFPGA: post-silicon tuning of dual-Vdd FPGAs. DAC 2008: 796-799
2007
69	EE	Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid: Sequential circuits for program analysis. ASE 2007: 114-123
68	EE	Fadi A. Zaraket, John Pape, Adnan Aziz, Magarida F. Jacome, Sarfraz Khurshid: Global Optimization of Compositional Systems. FMCAD 2007: 93-100
67	EE	Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid: Sequential Circuits for Relational Analysis. ICSE 2007: 13-22
66	EE	Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, Yehia Massoud: Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations. ISQED 2007: 873-878
65	EE	Xiang Wu, Tamer Ragheb, Adnan Aziz, Yehia Massoud: Implementing DSP Algorithms with On-Chip Networks. NOCS 2007: 307-316
64	EE	Bassam Jamil Mohd, Adnan Aziz, Earl E. Swartzlander Jr.: The hazard-free superscalar pipeline fast fourier transform algorithm and architecture. VLSI-SoC 2007: 194-199
63	EE	Ashish Kumar Singh, Adnan Aziz, Sriram Vishwanath, Michael Orshansky: Generation of Efficient Codes for Realizing Boolean Functions in Nanotechnologies CoRR abs/cs/0703102: (2007)
2005
62	EE	Hari Mony, Jason Baumgartner, Adnan Aziz: Exploiting Constraints in Transformation-Based Verification. CHARME 2005: 269-284
61		Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz: Scalable compositional minimization via static analysis. ICCAD 2005: 1060-1067
2004
60	EE	Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Wayne Wolf: Synthesizing interconnect-efficient low density parity check codes. DAC 2004: 488-491
59	EE	Amit Prakash, Adnan Aziz, Vijaya Ramachandran: Randomized Parallel Schedulers for Switch-Memory-Switch Routers: Analysis and Numerical Studies. INFOCOM 2004
58	EE	Jun Yuan, Adnan Aziz, Carl Pixley, Ken Albin: Simplifying Boolean constraint solving for random simulation-vector generation. IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 412-420 (2004)
2003
57	EE	Jun Yuan, Ken Albin, Adnan Aziz, Carl Pixley: Constraint synthesis for environment modeling in functional verification. DAC 2003: 296-299
56	EE	Jun Yuan, Carl Pixley, Adnan Aziz, Ken Albin: A Framework for Constrained Functional Verification. ICCAD 2003: 142-145
55	EE	Adnan Aziz, Amit Prakash, Vijaya Ramachandran: A near optimal scheduler for switch-memory-switch routers. SPAA 2003: 343-352
54	EE	Vigyan Singhal, Carl Pixley, Adnan Aziz, Shaz Qadeer, Robert K. Brayton: Sequential optimization in the absence of global reset. ACM Trans. Design Autom. Electr. Syst. 8(2): 222-251 (2003)
53	EE	Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal: BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. Formal Methods in System Design 22(3): 205-224 (2003)
52	EE	Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz: An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists. Formal Methods in System Design 23(1): 39-65 (2003)
51	EE	Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz: A high-performance architecture and BDD-based synthesis methodology for packet classification. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 698-709 (2003)
2002
50	EE	Malay K. Ganai, Adnan Aziz: Improved SAT-based Bounded Reachability Analysis. ASP-DAC 2002: 729-734
49	EE	Jun Yuan, Ken Albin, Adnan Aziz, Carl Pixley: Simplifying Boolean constraint solving for random simulation-vector generation. ICCAD 2002: 123-127
48	EE	Sadia Sharif, Adnan Aziz, Amit Prakash: An O(log2N) parallel algorithm for output queuing. INFOCOM 2002
47		Jun Yuan, Ken Albin, Adnan Aziz, Carl Pixley: Simplifying Constraint Solving in Random Simulation Generation. IWLS 2002: 185-190
46		Jun Yuan, Kurt Shultz, John Havlicek, Ken Albin, Adnan Aziz: A Method for Synthesizing Boolean Constrains. IWLS 2002: 351-353
45		Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz: A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet Classification. IWLS 2002: 97-102
44	EE	Malay K. Ganai, Adnan Aziz: Improved SAT-Based Bounded Reachability Analysis. VLSI Design 2002: 729-734
43		Adnan Aziz, Thomas R. Shiple, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Formula-Dependent Equivalence for Compositional CTL Model Checking. Formal Methods in System Design 21(2): 193-224 (2002)
2001
42	EE	Malay K. Ganai, Adnan Aziz: Rarity based guided state space search. ACM Great Lakes Symposium on VLSI 2001: 97-102
41	EE	I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz, D. F. Wong: Integrated power supply planning and floorplanning. ASP-DAC 2001: 589-594
40	EE	Tai-Hung Liu, Adnan Aziz, Vigyan Singhal: Optimizing designs containing black boxes. ACM Trans. Design Autom. Electr. Syst. 6(4): 591-601 (2001)
39	EE	Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton: Theory of safe replacements for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 249-265 (2001)
38	EE	Adnan Aziz, James H. Kukula, Thomas R. Shiple, Jun Yuan: Efficient control state-space search. IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 332-336 (2001)
37	EE	Hai Zhou, Adnan Aziz: Buffer minimization in pass transistor logic. IEEE Trans. on CAD of Integrated Circuits and Systems 20(5): 693-697 (2001)
2000
36		Jason Baumgartner, Anson Tripp, Adnan Aziz, Vigyan Singhal, Flemming Andersen: An Abstraction Algorithm for the Verification of Generalized C-Slow Designs. CAV 2000: 5-19
35	EE	Praveen Yalagandula, Adnan Aziz, Vigyan Singhal: Automatic Lighthouse Generation for Directed State Space Search. DATE 2000: 237-242
34	EE	I-Min Liu, Adnan Aziz, D. F. Wong: Meeting Delay Constraints in DSM by Minimal Repeater Insertion. DATE 2000: 436-440
33	EE	I-Min Liu, Adnan Aziz: Delay Constrained Optimization by Simultaneous Fanout Tree Construction, Buffer Insertion/Sizing and Gate Sizing. ICCD 2000: 209-214
32	EE	Hai Zhou, Adnan Aziz: Buffer minimization in pass transistor logic. ISPD 2000: 105-110
31	EE	I-Min Liu, Tan-Li Chou, Adnan Aziz, D. F. Wong: Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion. ISPD 2000: 33-38
30	EE	Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton: Model-checking continous-time Markov chains. ACM Trans. Comput. Log. 1(1): 162-170 (2000)
29	EE	Adnan Aziz, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Sequential synthesis using S1S. IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1149-1162 (2000)
28	EE	Hai Zhou, Martin D. F. Wong, I-Min Liu, Adnan Aziz: Simultaneous routing and buffer insertion with restrictions onbuffer locations. IEEE Trans. on CAD of Integrated Circuits and Systems 19(7): 819-824 (2000)
1999
27	EE	Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz: Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists. CAV 1999: 72-83
26	EE	Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann: Enhancing Simulation with BDDs and ATPG. DAC 1999: 385-390
25	EE	Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz: Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations. DAC 1999: 96-99
24	EE	Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz: Modeling design constraints and biasing in simulation using BDDs. ICCAD 1999: 584-590
23	EE	I-Min Liu, Adnan Aziz, D. F. Wong, Hai Zhou: An Efficient Buffer Insertion Algorithm for Large Networks Based on Lagrangian Relaxation. ICCD 1999: 210-215
22	EE	Srivatsan Srinivasan, Parminder Singh Chhabra, Praveen Kumar Jaini, Adnan Aziz, Lizy Kurian John: Formal Verification of a Snoop-Based Cache Coherence Protocol Using Symbolic Model Checking. VLSI Design 1999: 288-293
21		Tai-Hung Liu, Malay K. Ganai, Adnan Aziz, Jeffrey L. Burns: Performance Driven Synthesis for Pass-Transistor Logic. VLSI Design 1999: 372-377
1998
20		Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal: BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. CAV 1998: 244-255
19	EE	Adnan Aziz, James H. Kukula, Thomas R. Shiple: Hybrid Verification Using Saturated Simulation. DAC 1998: 615-618
18	EE	Yufeng Luo, Tjahjadi Wongsonegoro, Adnan Aziz: Hybrid Techniques for Fast Functional Simulation. DAC 1998: 664-667
17	EE	James H. Kukula, Thomas R. Shiple, Adnan Aziz: Techniques for Implicit State Enumeration of EFSMs. FMCAD 1998: 469-482
1997
16		Jun Yuan, Jian Shen, Jacob A. Abraham, Adnan Aziz: On Combining Formal and Informal Verification. CAV 1997: 376-387
15	EE	Tai-Hung Liu, Khurram Sajid, Adnan Aziz, Vigyan Singhal: Optimizing Designs Containing Black Boxes. DAC 1997: 113-116
14	EE	Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli: Sequential optimisation without state space exploration. ICCAD 1997: 208-215
1996
13		Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton: Verifying Continuous Time Markov Chains. CAV 1996: 269-276
12		Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS: A System for Verification and Synthesis. CAV 1996: 428-432
11		Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS. FMCAD 1996: 248-256
1995
10		Adnan Aziz, Vigyan Singhal, Felice Balarin: It Usually Works: The Temporal Logic of Stochastic Systems. CAV 1995: 155-165
9		Adnan Aziz, Felice Balarin, Robert K. Brayton, M. D. DiBenedetto, Alexander Saldanha: Supervisory Control of Finite State Machines. CAV 1995: 279-292
8	EE	Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton: Exploiting power-up delay for sequential optimization. EURO-DAC 1995: 54-59
7	EE	Adnan Aziz, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Sequential synthesis using S1S. ICCAD 1995: 612-617
1994
6		Adnan Aziz, Thomas R. Shiple, Vigyan Singhal: Formula-Dependent Equivalence for Compositional CTL Model Checking. CAV 1994: 324-337
5	EE	Adnan Aziz, Serdar Tasiran, Robert K. Brayton: BDD Variable Ordering for Interacting Finite State Machines. DAC 1994: 283-288
4	EE	Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459
3		Adnan Aziz, Vigyan Singhal, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Equivalences for Fair Kripke Structures. ICALP 1994: 364-375
2	EE	Carl Pixley, Vigyan Singhal, Adnan Aziz, Robert K. Brayton: Multi-level synthesis for safe replaceability. ICCAD 1994: 442-449
1		Adnan Aziz, Vigyan Singhal, Gitanjali Swamy, Robert K. Brayton: Minimizing Interacting Finite State Machines: A Compositional Approach to Language to Containment. ICCD 1994: 255-261

Coauthor Index

1	Jacob A. Abraham	[16]
2	Ken Albin	[46] [47] [49] [56] [57] [58]
3	Flemming Andersen	[36]
4	Felice Balarin	[3] [4] [7] [9] [10] [29]
5	Jason Baumgartner	[27] [36] [52] [61] [62]
6	Stephen Bijansky	[70]
7	Robert K. Brayton	[1] [2] [3] [4] [5] [7] [8] [9] [11] [12] [13] [14] [29] [30] [39] [43] [54]
8	Jeffrey L. Burns	[21]
9	Hung-Ming Chen	[41]
10	Szu-Tsung Cheng	[4] [11] [12]
11	Parminder Singh Chhabra	[22]
12	Tan-Li Chou	[31] [41]
13	M. D. DiBenedetto	[9]
14	Stephen A. Edwards	[11] [12]
15	Malay K. Ganai	[21] [26] [42] [44] [50]
16	Anuj Goel	[20] [53]
17	Gary D. Hachtel	[11] [12]
18	John Havlicek	[46]
19	Tamir Heyman	[27] [52]
20	Ramin Hojati	[4]
21	Magarida F. Jacome	[68]
22	Praveen Kumar Jaini	[22]
23	Lizy Kurian John (Lizy K. John)	[22]
24	Timothy Kam	[4]
25	Sunil P. Khatri	[11] [12]
26	Sarfraz Khurshid	[67] [68] [69]
27	Ramakrishna Kotla	[45] [51]
28	Sriram C. Krishnan	[4]
29	Andreas Kuehlmann	[26]
30	Yuji Kukimoto	[11] [12]
31	James H. Kukula	[17] [19] [38]
32	I-Min Liu	[23] [25] [28] [31] [33] [34] [41]
33	Tai-Hung Liu	[15] [21] [40]
34	Yufeng Luo	[18]
35	Tanmoy Mandal	[45] [51]
36	Yehia Massoud	[65] [66]
37	Amit Mehrotra	[14]
38	Hillel Miller	[24]
39	Bassam Jamil Mohd	[64]
40	Marghoob Mohiyuddin	[60]
41	Mosin Mondal	[66]
42	Hari Mony	[62]
43	Michael Orshansky	[63]
44	John Pape	[68]
45	Abelardo Pardo	[11] [12]
46	Carl Pixley	[2] [8] [24] [39] [47] [49] [54] [56] [57] [58]
47	Amit Prakash	[45] [48] [51] [55] [59] [60]
48	Shaz Qadeer	[11] [12] [14] [54]
49	Tamer Ragheb	[65] [66]
50	Vijaya Ramachandran	[55] [59]
51	Rajeev K. Ranjan	[4] [11] [12]
52	Khurram Sajid	[15] [20] [53]
53	Alexander Saldanha	[9]
54	Alberto L. Sangiovanni-Vincentelli	[3] [4] [7] [11] [12] [14] [29] [43]
55	Kumud Sanwal	[13] [30]
56	Shaker Sarwary	[11] [12]
57	Sadia Sharif	[48]
58	Jian Shen	[16]
59	Thomas R. Shiple	[4] [6] [11] [12] [17] [19] [38] [43]
60	Kurt Shultz	[24] [46]
61	Ashish Kumar Singh	[63]
62	Vigyan Singhal	[1] [2] [3] [4] [6] [8] [10] [13] [14] [15] [20] [27] [30] [35] [36] [39] [40] [43] [52] [53] [54]
63	Fabio Somenzi	[11] [12]
64	Srivatsan Srinivasan	[22]
65	Gitanjali Swamy	[1] [11] [12]
66	Earl E. Swartzlander Jr.	[64]
67	Serdar Tasiran	[4] [5]
68	Anson Tripp	[36]
69	Tiziano Villa	[11] [12]
70	Sriram Vishwanath	[63]
71	Huey-Yih Wang	[4]
72	Wayne Wolf	[60]
73	Martin D. F. Wong (D. F. Wong)	[23] [25] [28] [31] [34] [41]
74	Tjahjadi Wongsonegoro	[18]
75	Xiang Wu	[65] [66]
76	Praveen Yalagandula	[35]
77	Jun Yuan	[16] [24] [38] [46] [47] [49] [56] [57] [58]
78	Fadi A. Zaraket	[61] [67] [68] [69]
79	Hai Zhou	[20] [23] [25] [28] [32] [37] [53]

Colors in the list of coauthors