Guido Bertoni

2008
24	EE	Guido Bertoni, Joan Daemen, Michael Peeters, Gilles Van Assche: On the Indifferentiability of the Sponge Construction. EUROCRYPT 2008: 181-197
23	EE	Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi: A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. ITNG 2008: 112-119
22	EE	Guido Bertoni, Luca Breveglieri, Liqun Chen, Pasqualina Fragneto, Keith A. Harrison, Gerardo Pelosi: A pairing SW implementation for Smart-Cards. Journal of Systems and Software 81(7): 1240-1247 (2008)
2006
21	EE	Guido Bertoni, Luca Breveglieri, Farina Roberto, Francesco Regazzoni: Speeding Up AES By Extending a 32 bit Processor Instruction Set. ASAP 2006: 275-282
20	EE	Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, L. Sportiello: Software implementation of Tate pairing over GF(2m). DATE Designers' Forum 2006: 7-11
19	EE	Thomas J. Wollinger, Guido Bertoni, Luca Breveglieri, Christof Paar: Performance of HECC Coprocessors Using Inversion-Free Formulae. ICCSA (3) 2006: 1004-1012
18	EE	Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi: Parallel Hardware Architectures for the Cryptographic Tate Pairing. ITNG 2006: 186-191
17	EE	Guido Bertoni, Luca Breveglieri, Matteo Venturi: ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. ITNG 2006: 573-574
16	EE	Guido Bertoni, Luca Breveglieri, Matteo Venturi: Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. PerCom Workshops 2006: 337-341
2005
15	EE	Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo: AES Power Attack Based on Induced Cache Miss and Countermeasure. ITCC (1) 2005: 586-591
14	EE	Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luca Breveglieri: A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. ITCC (1) 2005: 626-630
2004
13	EE	Guido Bertoni, Marco Macchetti, Luca Negri, Pasqualina Fragneto: Power-efficient ASIC synthesis of cryptographic sboxes. ACM Great Lakes Symposium on VLSI 2004: 277-281
12	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri: An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. DFT 2004: 130-138
11	EE	Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar: Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. ITCC (2) 2004: 538-
2003
10	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. ASAP 2003: 423-432
9	EE	Guido Bertoni, Jorge Guajardo, Sandeep S. Kumar, Gerardo Orlando, Christof Paar, Thomas J. Wollinger: Efficient GF(pm) Arithmetic Architectures for Cryptographic Applications. CT-RSA 2003: 158-175
8	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. DFT 2003: 105-
7	EE	Guido Bertoni, Jorge Guajardo, Gerardo Orlando: Systolic and Scalable Architectures for Digit-Serial Multiplication in Fields GF(pm). INDOCRYPT 2003: 349-362
6	EE	Guido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria: About the performances of the Advanced Encryption Standard in embedded systems with cache memory. ISCAS (5) 2003: 145-148
5	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans. Computers 52(4): 492-505 (2003)
2002
4	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP 2002: 303-
3	EE	Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin: Efficient Software Implementation of AES on 32-Bit Platforms. CHES 2002: 159-171
2	EE	Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri: A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. DFT 2002: 51-59
2001
1	EE	Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto: Efficient finite field digital-serial multiplier architecture for cryptography applications. DATE 2001: 812

Coauthor Index

1	Gilles Van Assche	[24]
2	Alessandro Barenghi	[23]
3	A. Bircan	[6]
4	Luca Breveglieri	[1] [2] [3] [4] [5] [6] [8] [10] [11] [12] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
5	Liqun Chen	[22]
6	Joan Daemen	[24]
7	Pasqualina Fragneto	[1] [3] [6] [13] [18] [20] [22]
8	Jorge Guajardo	[7] [9]
9	Keith A. Harrison	[22]
10	Israel Koren	[2] [4] [5] [8] [10] [12]
11	Sandeep S. Kumar	[9]
12	Marco Macchetti	[3] [6] [13]
13	Paolo Maistri	[2] [4] [5] [8] [10] [12]
14	Stefano Marchesin	[3]
15	Matteo Monchiero	[15]
16	Luca Negri	[13]
17	Gerardo Orlando	[7] [9]
18	Christof Paar	[9] [11] [19]
19	Gianluca Palermo	[15]
20	Michael Peeters	[24]
21	Gerardo Pelosi	[18] [20] [22] [23]
22	Vincenzo Piuri	[2] [4] [5] [8] [10]
23	Francesco Regazzoni	[21]
24	Farina Roberto	[21]
25	Fabio Sozzani	[14]
26	L. Sportiello	[20]
27	Stefano Turcato	[14]
28	Matteo Venturi	[16] [17]
29	Thomas J. Wollinger	[9] [11] [19]
30	Vittorio Zaccaria	[6] [15]

Colors in the list of coauthors