| 2007 |
|---|
| 7 | EE | Li Zhang,
Baoyong Chi,
Zhihua Wang,
Hongyi Chen,
Jinke Yao,
Ende Wu:
A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop.
ISCAS 2007: 2447-2450 |
| 6 | EE | Haolu Xie,
Xin Wang,
Albert Z. Wang,
Bo Qin,
Hongyi Chen,
Yumei Zhou,
Bin Zhao:
A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for UWB Transceivers in CMOS.
ISCAS 2007: 2794-2797 |
| 5 | | Haixin Wang,
Yao Yue,
Chunming Zhang,
Guoqiang Bai,
Hongyi Chen:
A Novel Unified Control Architecture for a High-Performance Network Security Accelerator.
Security and Management 2007: 573-579 |
| 4 | EE | Gang Chen,
Guoqiang Bai,
Hongyi Chen:
A New Systolic Architecture for Modular Division.
IEEE Trans. Computers 56(2): 282-286 (2007) |
| 2003 |
|---|
| 3 | EE | Xingjun Wu,
Hongyi Chen,
Yihe Sun,
Weixin Gai:
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems.
VLSI Signal Processing 33(1-2): 191-197 (2003) |
| 2002 |
|---|
| 2 | EE | Leibo Liu,
Xuejin Wang,
Hongying Meng,
Li Zhang,
Zhihua Wang,
Hongyi Chen:
A VLSI architecture of spatial combinative lifting algorithm based 2-D DWT/IDWT.
APCCAS (2) 2002: 299-304 |
| 2001 |
|---|
| 1 | | Lei Xu,
Yihe Sun,
Hongyi Chen:
Scan array solution for testing power and testing time.
ITC 2001: 652-659 |
