Kris Gaj

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2008
37EEMiaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi: An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm. Public Key Cryptography 2008: 214-228
36EETarek A. El-Ghazawi, Esam El-Araby, Miaoqing Huang, Kris Gaj, Volodymyr V. Kindratenko, Duncan A. Buell: The Promise of High-Performance Reconfigurable Computing. IEEE Computer 41(2): 69-76 (2008)
35EEProshanta Saha, Esam El-Araby, Miaoqing Huang, Mohamed Taher, Sergio López-Buedo, Tarek A. El-Ghazawi, Chang Shu, Kris Gaj, Alan Michalski, Duncan A. Buell: Portable library development for reconfigurable computing systems: A case study. Parallel Computing 34(4-5): 245-260 (2008)
2007
34EEDuncan A. Buell, Tarek A. El-Ghazawi, Kris Gaj, Volodymyr V. Kindratenko: Guest Editors' Introduction: High-Performance Reconfigurable Computing. IEEE Computer 40(3): 23-27 (2007)
2006
33EEDeapesh Misra, Kris Gaj: Face Recognition CAPTCHAs. AICT/ICIW 2006: 122
32EEKris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi: Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware. CHES 2006: 119-133
31EETarek A. El-Ghazawi, Duncan A. Buell, Volodymyr V. Kindratenko, Kris Gaj: M03 - Reconfigurable supercomputing. SC 2006: 217
30EEEsam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis: System-level parallelism and concurrency maximisation in reconfigurable computing applications. IJES 2(1/2): 62-72 (2006)
2005
29EEMohamed Taher, Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj: Image processing library for reconfigurable computers (abstract only). FPGA 2005: 276
28EETarek A. El-Ghazawi, Kris Gaj, Nikitas A. Alexandridis, Allen Michalski, Osman Devrim Fidanci, Mohamed Taher, Esam El-Araby, Esmail Chitalwala, Proshanta Saha: Reconfigurable computers: an empirical analysis (abstract only). FPGA 2005: 278
27 Allen Michalski, Kris Gaj, Duncan A. Buell: High-Throughput Reconfigurable Computing: A Design Study of an IDEA Encryption Cryptosystem on the SRC-6e Reconfigurable Computer. FPL 2005: 681-686
26 Amir Sheikh Zeineddini, Kris Gaj: Secure Partial Reconfiguration of FPGAs. FPT 2005: 155-162
25 Chang Shu, Kris Gaj, Tarek A. El-Ghazawi: Low Latency Elliptic Curve Cryptography Accelerators for NIST Curves Over Binary Fields. FPT 2005: 309-310
24 Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj: A System-Level Design Methodology for Reconfigurable Computing Applications. FPT 2005: 311-312
23 Milind M. Parelkar, Kris Gaj: Implementation of EAX Mode of Operation for FPGA Bitstream Encryption and Authentication. FPT 2005: 335-336
22 Charikleia Zouridaki, Marek Hejmo, Brian L. Mark, Roshan K. Thomas, Kris Gaj: Analysis of Attacks and Defense Mechanisms for QoS Signaling Protocols in MANETs. Wireless Information Systems 2005: 61-70
2004
21EEHartono Kurnio, Huaxiong Wang, Josef Pieprzyk, Kris Gaj: Securing Multicast Groups in Ad Hoc Networks. AWCC 2004: 194-207
20EESoonhak Kwon, Kris Gaj, Chang Hoon Kim, Chun Pyo Hong: Efficient Linear Array for Multiplication in GF(2m) Using a Normal Basis for Elliptic Curve Cryptography. CHES 2004: 76-91
19EERoar Lien, Tim Grembowski, Kris Gaj: A 1 Gbit/s Partially Unrolled Architecture of Hash Functions SHA-1 and SHA-512. CT-RSA 2004: 324-338
18EECharikleia Zouridaki, Brian L. Mark, Kris Gaj, Roshan K. Thomas: Distributed CA-based PKI for Mobile Ad Hoc Networks Using Elliptic Curve Cryptography. EuroPKI 2004: 232-245
17EESashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi: Implementation of elliptic curve cryptosystems over GF(2n) in optimal normal basis on a reconfigurable computer. FPGA 2004: 259
16EEPaul Kohlbrenner, Kris Gaj: An embedded true random number generator for FPGAs. FPGA 2004: 71-78
15EESashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi: Implementation of Elliptic Curve Cryptosystems over GF(2n) in Optimal Normal Basis on a Reconfigurable Computer. FPL 2004: 1001-1005
14EEEsam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis: System-Level Parallelism and Throughput Optimization in Designing Reconfigurable Computing Applications. IPDPS 2004
13EETarek A. El-Ghazawi, Kris Gaj, Nikitas A. Alexandridis, Frederic Vroman, Nguyen Nguyen, Jacek R. Radzikowski, Preeyapong Samipagdi, Suboh A. Suboh: A performance study of job management systems. Concurrency - Practice and Experience 16(13): 1229-1246 (2004)
2003
12EEPawel Chodowiec, Kris Gaj: Very Compact FPGA Implementation of the AES Algorithm. CHES 2003: 319-333
11EEKris Gaj, Arkadiusz Orlowski: Facts and Myths of Enigma: Breaking Stereotypes. EUROCRYPT 2003: 106-122
10EEAllen Michalski, Kris Gaj, Tarek A. El-Ghazawi: An Implementation Comparison of an IDEA Encryption Cryptosystem on Two General-Purpose Reconfigurable Computers. FPL 2003: 204-219
9EEPeter Bellows, Jaroslav Flidr, Ladan Gharai, Colin Perkins, Pawel Chodowiec, Kris Gaj: IPsec-Protected Transport of HDTV over IP. FPL 2003: 869-879
8EEOsman Devrim Fidanci, Daniel S. Poznanovic, Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis: Performance and Overhead in a Hybrid Reconfigurable Computer. IPDPS 2003: 176
7EEKris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis, Jacek R. Radzikowski, Mohamed Taher, Frederic Vroman: Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems. IPDPS 2003: 177
2002
6EEKris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis, Frederic Vroman, Nguyen Nguyen, Jacek R. Radzikowski, Preeyapong Samipagdi, Suboh A. Suboh: Performance Evaluation of Selected Job Management Systems. IPDPS 2002
5EETim Grembowski, Roar Lien, Kris Gaj, Nghi Nguyen, Peter Bellows, Jaroslav Flidr, Tom Lehman, Brian Schott: Comparative Analysis of the Hardware Implementations of Hash Functions SHA-1 and SHA-512. ISC 2002: 75-89
2001
4EEKris Gaj, Pawel Chodowiec: Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate Arrays. CT-RSA 2001: 84-99
3EEPawel Chodowiec, Po Khuon, Kris Gaj: Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining. FPGA 2001: 94-102
2EEPawel Chodowiec, Kris Gaj, Peter Bellows, Brian Schott: Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board. ISC 2001: 220-234
2000
1 Kris Gaj, Pawel Chodowiec: Comparison of the Hardware Performance of the AES Candidates Using Reconfigurable Hardware. AES Candidate Conference 2000: 40-54

Coauthor Index

1Nikitas A. Alexandridis [6] [7] [8] [13] [14] [28] [30]
2Ramakrishna Bachimanchi [32]
3Patrick Baier [32]
4Sashisu Bajracharya [15] [17]
5Peter Bellows [2] [5] [9]
6Duncan A. Buell [27] [31] [34] [35] [36]
7David Caliga [14] [30]
8Esmail Chitalwala [28]
9Pawel Chodowiec [1] [2] [3] [4] [9] [12]
10Esam El-Araby [14] [24] [28] [29] [30] [35] [36]
11Tarek A. El-Ghazawi [6] [7] [8] [10] [13] [14] [15] [17] [24] [25] [28] [29] [30] [31] [34] [35] [36] [37]
12Osman Devrim Fidanci [8] [28]
13Jaroslav Flidr [5] [9]
14Ladan Gharai [9]
15Tim Grembowski [5] [19]
16Marek Hejmo [22]
17Chun Pyo Hong [20]
18Miaoqing Huang [35] [36] [37]
19Mohammed Khaleeluddin [32]
20Po Khuon [3]
21Chang Hoon Kim [20]
22Volodymyr V. Kindratenko [31] [34] [36]
23Paul Kohlbrenner [16] [32]
24Hartono Kurnio [21]
25Soonhak Kwon [20] [32] [37]
26Hoang Le [32]
27Tom Lehman [5]
28Roar Lien [5] [19]
29Sergio López-Buedo [35]
30Brian L. Mark [18] [22]
31Alan Michalski [35]
32Allen Michalski [10] [27] [28]
33Deapesh Misra [33]
34Nghi Nguyen [5]
35Nguyen Nguyen [6] [13]
36Arkadiusz Orlowski [11]
37Milind M. Parelkar [23]
38Colin Perkins [9]
39Josef Pieprzyk [21]
40Daniel S. Poznanovic [8]
41Jacek R. Radzikowski [6] [7] [13]
42Proshanta Saha [28] [35]
43Preeyapong Samipagdi [6] [13]
44Brian Schott [2] [5]
45Chang Shu [15] [17] [25] [35]
46Suboh A. Suboh [6] [13]
47Mohamed Taher [7] [14] [28] [29] [30] [35]
48Roshan K. Thomas [18] [22]
49Frederic Vroman [6] [7] [13]
50Huaxiong Wang [21]
51Amir Sheikh Zeineddini [26]
52Charikleia Zouridaki [18] [22]

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Copyright © Wed Jul 23 13:04:14 2008 by Michael Ley (ley@uni-trier.de)