| 2007 |
|---|
| 10 | EE | Yongjian Tang,
Hans Hegt,
Arthur H. M. van Roermund,
Konstantinos Doris,
Joost Briaire:
Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs.
ISCAS 2007: 1225-1228 |
| 9 | EE | Georgi I. Radulov,
Patrick J. Quinn,
Pieter Harpe,
Hans Hegt,
Arthur H. M. van Roermund:
Parallel current-steering D/A Converters for Flexibility and Smartness.
ISCAS 2007: 1465-1468 |
| 8 | EE | Pieter Harpe,
Athon Zanikopoulos,
Hans Hegt,
Arthur H. M. van Roermund:
Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs.
ISCAS 2007: 1951-1954 |
| 7 | EE | Athon Zanikopoulos,
Pieter Harpe,
Hans Hegt,
Arthur H. M. van Roermund:
Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC.
ISCAS 2007: 3876-3879 |
| 6 | EE | Sotir Ouzounov,
Engel Roza,
Hans Hegt,
Gerard v. d. Weide,
Arthur H. M. van Roermund:
Design of MOS transconductors with low noise and low harmonic distortion for minimum current consumption.
Integration 40(3): 365-379 (2007) |
| 2006 |
|---|
| 5 | EE | Yongjian Tang,
Hans Hegt,
Arthur H. M. van Roermund:
DDL-based calibration techniques for timing errors in current-steering DACs.
ISCAS 2006 |
| 4 | EE | Pieter Harpe,
Athon Zanikopoulos,
Hans Hegt,
Arthur H. M. van Roermund:
Digital post-correction of front-end track-and-hold circuits in ADCs.
ISCAS 2006 |
| 2005 |
|---|
| 3 | EE | Arthur H. M. van Roermund,
Hans Hegt,
Pieter Harpe,
Georgi I. Radulov,
Athon Zanikopoulos,
Konstantinos Doris,
Patrick J. Quinn:
Smart AD and DA converters.
ISCAS (4) 2005: 4062-4065 |
| 2 | EE | Athon Zanikopoulos,
Pieter Harpe,
Hans Hegt,
Arthur H. M. van Roermund:
A flexible ADC approach for mixed-signal SoC platforms.
ISCAS (5) 2005: 4839-4842 |
| 2001 |
|---|
| 1 | EE | V. Mladenov,
Hans Hegt,
Arthur H. M. van Roermund:
Terminal dynamics approach to cellular neural networks.
ISCAS (3) 2001: 97-100 |
