| 2001 |
|---|
| 7 | EE | E. Cantó,
Juan Manuel Moreno,
Joan Cabestany,
I. Lacadena,
Josep Maria Insenser:
A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs.
IEEE Trans. VLSI Syst. 9(1): 210-218 (2001) |
| 2000 |
|---|
| 6 | EE | E. Cantó,
Juan Manuel Moreno,
Joan Cabestany,
I. Lacadena,
Josep Maria Insenser:
Implementation of Virtual Circuits by Means of the FIPSOC Devices.
FPL 2000: 87-95 |
| 1999 |
|---|
| 5 | EE | Juan Manuel Moreno,
Jordi Madrenas,
Joan Cabestany,
E. Cantó,
Rafal Kielbik,
Julio Faura,
Josep Maria Insenser:
Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration.
Evolvable Hardware 1999: 182-187 |
| 4 | | E. Cantó,
Juan Manuel Moreno,
Joan Cabestany,
Julio Faura,
Josep Maria Insenser:
A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic.
FPL 1999: 134-143 |
| 3 | | Juan Manuel Moreno,
Joan Cabestany,
E. Cantó,
Julio Faura,
Josep Maria Insenser:
The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware.
IWANN (2) 1999: 85-94 |
| 1998 |
|---|
| 2 | EE | Juan Manuel Moreno,
Jordi Madrenas,
Julio Faura,
E. Cantó,
Joan Cabestany,
Josep Maria Insenser:
Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices.
ICES 1998: 345-355 |
| 1997 |
|---|
| 1 | | Julio Faura,
Juan Manuel Moreno,
Miguel Angel Aguirre Echánove,
Phuoc van Duong,
Josep Maria Insenser:
Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor.
FPL 1997: 1-10 |
