| 2007 |
|---|
| 8 | EE | Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello,
Martin Margala:
A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications.
AHS 2007: 119-126 |
| 7 | EE | Pasquale Corsonello,
Stefania Perri,
G. Staino,
Marco Lanuzza,
Giuseppe Cocorullo:
Design and Implementation of a 90nm Low bit-rate Image Compression Core.
DSD 2007: 383-389 |
| 6 | EE | Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello:
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing.
SAMOS 2007: 159-168 |
| 2006 |
|---|
| 5 | EE | Pasquale Corsonello,
Stefania Perri,
G. Staino,
Marco Lanuzza,
Giuseppe Cocorullo:
Low bit rate image compression core for onboard space applications.
IEEE Trans. Circuits Syst. Video Techn. 16(1): 114-128 (2006) |
| 2005 |
|---|
| 4 | | Marco Lanuzza,
Stefania Perri,
Martin Margala,
Pasquale Corsonello:
Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor.
FPL 2005: 13-18 |
| 3 | EE | Marco Lanuzza,
Martin Margala,
Pasquale Corsonello:
Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications.
ISLPED 2005: 161-166 |
| 2 | EE | Stefania Perri,
Marco Lanuzza,
Pasquale Corsonello,
Giuseppe Cocorullo:
A high-performance fully reconfigurable FPGA-based 2D convolution processor.
Microprocessors and Microsystems 29(8-9): 381-391 (2005) |
| 2004 |
|---|
| 1 | EE | Stefania Perri,
Pasquale Corsonello,
Maria Antonia Iachino,
Marco Lanuzza,
Giuseppe Cocorullo:
Variable precision arithmetic circuits for FPGA-based multimedia processors.
IEEE Trans. VLSI Syst. 12(9): 995-999 (2004) |
