| 2000 | ||
|---|---|---|
| 2 | EE | Zhen Luo, Margaret Martonosi: Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques. IEEE Trans. Computers 49(3): 208-218 (2000) |
| 1999 | ||
| 1 | EE | Zhen Luo, Margaret Martonosi, Pranav Ashar: An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking. FCCM 1999: 158-167 |
| 1 | Pranav Ashar | [1] |
| 2 | Margaret Martonosi | [1] [2] |