| 2007 |
|---|
| 5 | EE | Naghmeh Karimi,
Shahrzad Mirkhani,
Zainalabedin Navabi,
Fabrizio Lombardi:
RT level reliability enhancement by constructing dynamic TMRS.
ACM Great Lakes Symposium on VLSI 2007: 172-175 |
| 2005 |
|---|
| 4 | EE | Shahrzad Mirkhani,
Zainalabedin Navabi:
Enhancing Fault Simulation Performance by Dynamic Fault Clustering.
Asian Test Symposium 2005: 278-283 |
| 2002 |
|---|
| 3 | EE | Shahrzad Mirkhani,
Meisam Lavasani,
Zainalabedin Navabi:
Hierarchical Fault Simulation Using Behavioral and Gate Level Hardware Models.
Asian Test Symposium 2002: 374- |
| 2001 |
|---|
| 2 | EE | Hamed Farshbaf,
Mina Zolfy,
Shahrzad Mirkhani,
Zainalabedin Navabi:
Fault Simulation for VHDL Based Test Bench and BIST Evaluation.
Asian Test Symposium 2001: 396- |
| 1 | EE | Mina Zolfy,
Shahrzad Mirkhani,
Zainalabedin Navabi:
Adaptation of an event-driven simulation environment to sequentially propagated concurrent fault simulation.
DATE 2001: 823 |
