| 2008 |
|---|
| 9 | EE | Bill Mitchell:
Characterizing Communication Channel Deadlocks in Sequence Diagrams.
IEEE Trans. Software Eng. 34(3): 305-320 (2008) |
| 2007 |
|---|
| 8 | EE | Bill Mitchell:
Lazy buffer semantics for partial order scenarios.
Autom. Softw. Eng. 14(4): 419-441 (2007) |
| 2005 |
|---|
| 7 | EE | Paul Baker,
Paul Bristow,
Clive Jervis,
David J. King,
Robert Thomson,
Bill Mitchell,
Simon Burton:
Detecting and resolving semantic pathologies in UML sequence diagrams.
ESEC/SIGSOFT FSE 2005: 50-59 |
| 6 | EE | Bill Mitchell:
Resolving Race Conditions in Asynchronous Partial Order Scenarios.
IEEE Trans. Software Eng. 31(9): 767-784 (2005) |
| 2004 |
|---|
| 5 | EE | Bill Mitchell:
Inherent Causal Orderings of Partial Order Scenarios.
ICTAC 2004: 113-127 |
| 4 | EE | Bill Mitchell,
Robert Thomson,
Paul Bristow:
Scenario Synthesis from Imprecise Requirements.
SAM 2004: 122-137 |
| 3 | | Bill Mitchell,
Robert Thomson,
Paul Bristow:
Model Synthesis from Imprecise Specifications.
VVEIS 2004: 20-25 |
| 2003 |
|---|
| 2 | | Bill Mitchell,
Robert Thomson,
Clive Jervis:
Phase Automaton for Requirements Scenarios.
FIW 2003: 77-84 |
| 2002 |
|---|
| 1 | EE | Paul Baker,
Paul Bristow,
Clive Jervis,
David J. King,
Bill Mitchell:
Automatic Generation of Conformance Tests from Message Sequence Charts.
SAM 2002: 170-198 |
