Lasse Natvig

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2006
8EEHaakon Dybdahl, Marius Grannæs, Lasse Natvig: Cache Write-Back Schemes for Embedded Destructive-Read DRAM. ARCS 2006: 145-159
7EECyril Banino-Rokkones, Olivier Beaumont, Lasse Natvig: Master-Slave Tasking on Asymmetric Networks. Euro-Par 2006: 167-176
6EEHaakon Dybdahl, Per Stenström, Lasse Natvig: A Cache-Partitioning Aware Replacement Policy for Chip Multiprocessors. HiPC 2006: 22-34
2004
5EELasse Natvig, Steinar Line: Age of computers: game-based teaching of computer fundamentals. ITiCSE 2004: 107-111
2001
4EELasse Natvig: Simulating Parallel Architectures with BSPlab. HPCN Europe 2001: 547-550
3EETormod Njølstad, Lasse Natvig: Experience from a 450 Students/Year Course on Digital Logic and Computer Fundamentals using FPGAs and mu-Controllers. MSE 2001: 18-19
1994
2 Lasse Natvig: Compile and Runtime Padding: An Approach to Realising Synchronous MIMD Execution. IFIP Congress (1) 1994: 553-558
1990
1EELasse Natvig: Logarithmic time cost optimal parallel sorting is not yet fast in practice!. SC 1990: 486-494

Coauthor Index

1Cyril Banino-Rokkones (Cyril Banino) [7]
2Olivier Beaumont [7]
3Haakon Dybdahl [6] [8]
4Marius Grannæs [8]
5Steinar Line [5]
6Tormod Njølstad [3]
7Per Stenström [6]

Colors in the list of coauthors

Copyright © Wed Aug 20 16:51:14 2008 by Michael Ley (ley@uni-trier.de)