Saeid Nooshabadi

2007
26	EE	Michael Dyer, Saeid Nooshabadi, David S. Taubman: Analysis of Multiple Parallel Block Coding in JPEG2000. ICIP (5) 2007: 173-176
25	EE	Amit Kumar Gupta, Saeid Nooshabadi, David Taubman: Efficient Data Transfer Techniques and VLSI architecture for DWT-Block Coder Integration of JPEG2000 Encoder. ISCAS 2007: 1365-1368
24	EE	José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects. ISCAS 2007: 881-884
23	EE	A. K. Gupta, Saeid Nooshabadi: Novel Distortion Estimation Technique for Hardware-Based JPEG2000 Encoder System. IEEE Trans. Circuits Syst. Video Techn. 17(7): 918-923 (2007)
22	EE	Victor Navarro-Botello, Juan A. Montiel-Nelson, Saeid Nooshabadi: High performance low power CMOS dynamic logic for arithmetic circuits. Microelectronics Journal 38(4-5): 482-488 (2007)
2006
21	EE	José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Low Power Bootstrapped CMOS Differential Cross Coupled Driver. APCCAS 2006: 704-707
20	EE	José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Bootstrapped full--swing CMOS driver for low supply voltage operation. DATE 2006: 410-411
19	EE	F. Sobhanmanesh, Saeid Nooshabadi: VLSI architecture for 4×4 16-QAM V-BLAST decoder. ISCAS 2006
18	EE	A. K. Gupta, Saeid Nooshabadi, David Taubman, Michael Dyer: Realizing Low-Cost High-Throughput General-Purpose Block Encoder for JPEG2000. IEEE Trans. Circuits Syst. Video Techn. 16(7): 843-858 (2006)
17	EE	Victor Navarro-Botello, Juan A. Montiel-Nelson, Saeid Nooshabadi: Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications. J. Low Power Electronics 2(2): 300-307 (2006)
2005
16	EE	Michael Dyer, David Taubman, Saeid Nooshabadi: Reduced latency arithmetic decoder for JPEG2000 block decoding. ISCAS (3) 2005: 2076-2079
15	EE	Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman: Efficient VLSI architecture for buffer used in EBCOT of JPEG2000 encoder. ISCAS (5) 2005: 4361-4364
14	EE	Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman: Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000. ISCAS (5) 2005: 4373-4376
13	EE	A. Pouladi, Saeid Nooshabadi: Opcode encoding for low power embedded systems. ISCAS (5) 2005: 5262-5265
12	EE	Chul Kim, A. M. Rassau, Stefan Lachowicz, Saeid Nooshabadi, Kamran Eshraghian: 3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System. VLSI-SoC 2005: 71-86
11	EE	Amit Kumar Gupta, Saeid Nooshabadi, David Taubman: Concurrent Symbol Processing Capable VLSI Architecture for Bit Plane Coder of JPEG2000. IEICE Transactions 88-D(8): 1878-1884 (2005)
2004
10		Michael Dyer, David S. Taubman, Saeid Nooshabadi: Improved throughput arithmetic coder for jpeg2000. ICIP 2004: 2817-2820
9	EE	K. Oteng-Amoako, Saeid Nooshabadi, J. Yuan: Design and Performance of Asymmetric Turbo Coded Hybrid-ARQ. ICT 2004: 1369-1381
2001
8	EE	Saeid Nooshabadi: Modelling of effects of temperature profile in the MOS transistor characteristics. ISCAS (1) 2001: 81-84
7	EE	Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi: A compact layout technique to minimize high frequency switching effects in high speed circuits. ISCAS (4) 2001: 96-99
6	EE	J. Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi: Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimization. ISCAS (5) 2001: 527-530
2000
5	EE	Saeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, J. Sosa: A Single Phase Latch for High Speed GaAs Domino Circuits. DATE 2000: 760
1999
4	EE	Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez: High Speed GaAs Subsystem Design using Feed Through Logic. DATE 1999: 509-
1998
3		Saeid Nooshabadi, G. S. Visweswaran, D. Nagchoudhuri: Current Mode Ternary D/A Converter. VLSI Design 1998: 244-248
1997
2	EE	Kamran Eshraghian, Juan A. Montiel-Nelson, Saeid Nooshabadi: An Asynchronous Morphological Processor for Multi-Media Applications. VLSI Design 1997: 336-341
1	EE	Saeid Nooshabadi, Juan A. Montiel-Nelson, G. S. Visweswaran, D. Nagchoudhuri: Micropipeline Architecture for Multiplier-less FIR Filters. VLSI Design 1997: 451-456

Coauthor Index

1	V. de Armas	[4] [7]
2	Michael Dyer	[10] [16] [18] [26]
3	Kamran Eshraghian	[2] [12]
4	José C. García	[20] [21] [24]
5	A. K. Gupta	[18] [23]
6	Amit Kumar Gupta	[11] [14] [15] [25]
7	Chul Kim	[12]
8	Stefan Lachowicz	[12]
9	Juan A. Montiel-Nelson	[1] [2] [4] [5] [6] [7] [17] [20] [21] [22] [24]
10	D. Nagchoudhuri	[1] [3]
11	Victor Navarro-Botello	[17] [22]
12	Antonio Núñez	[4] [5] [7]
13	K. Oteng-Amoako	[9]
14	A. Pouladi	[13]
15	A. M. Rassau	[12]
16	Roberto Sarmiento	[4] [5] [7]
17	F. Sobhanmanesh	[19]
18	J. Sosa	[5] [6]
19	David S. Taubman (David Taubman)	[10] [11] [14] [15] [16] [18] [25] [26]
20	G. S. Visweswaran	[1] [3]
21	J. Yuan	[9]

Colors in the list of coauthors