| 2007 | ||
|---|---|---|
| 3 | EE | Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Bounded Delay Timing Analysis Using Boolean Satisfiability. VLSI Design 2007: 295-302 |
| 2 | EE | Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) |
| 2005 | ||
| 1 | Suchismita Roy, Sayantan Das, Prasenjit Basu, Pallab Dasgupta, Partha Pratim Chakrabarti: SAT based solutions for consistency problems in formal property specifications for open systems. ICCAD 2005: 885-888 | |
| 1 | Prasenjit Basu | [1] |
| 2 | P. P. Chakrabarti (Partha Pratim Chakrabarti) | [1] [2] [3] |
| 3 | Sayantan Das | [1] |
| 4 | Pallab Dasgupta | [1] [2] [3] |