Jian Ruan

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2008
5EEJian Ruan, Chung-Len Lee: A Fast Two-Stage Sample-and-Hold Amplifier for Pipelined ADC Application. DELTA 2008: 99-102
2007
4EEYong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai: Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. Asia-Pacific Computer Systems Architecture Conference 2007: 354-363
3EEYong Li, Zhiying Wang, Jian Ruan, Kui Dai: A Low-Power Globally Synchronous Locally Asynchronous FFT Processor. HPCC 2007: 168-179
2EEJian Ruan, Zhiying Wang, Kui Dai, Yong Li: Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. International Conference on Computational Science (4) 2007: 251-258
1EEJian Ruan, Zhiying Wang, Kui Dai, Yong Li: Design and Test of Self-checking Asynchronous Control Circuit. PATMOS 2007: 320-329

Coauthor Index

1Kui Dai [1] [2] [3] [4]
2Chung-Len Lee [5]
3Yong Li [1] [2] [3] [4]
4Zhiying Wang [1] [2] [3] [4]
5Xue-mi Zhao [4]

Colors in the list of coauthors

Copyright © Wed Dec 3 19:24:04 2008 by Michael Ley (ley@uni-trier.de)