| 2008 |
|---|
| 209 | EE | Jamie Macbeth,
Majid Sarrafzadeh:
Scalable medium access control for in-network data aggregation.
DIALM-POMC 2008: 13-22 |
| 208 | EE | Maryam Moazeni,
Alireza Vahdatpour,
Karthik Gururaj,
Majid Sarrafzadeh:
Communication bottleneck in hardware-software partitioning.
FPGA 2008: 262 |
| 2007 |
|---|
| 207 | EE | Shigetoshi Nakatake,
Zohreh Karimi,
Taraneh Taghavi,
Majid Sarrafzadeh:
Block placement to ensure channel routability.
ACM Great Lakes Symposium on VLSI 2007: 465-468 |
| 206 | EE | Ani Nahapetian,
Paolo Lombardo,
Andrea Acquaviva,
Luca Benini,
Majid Sarrafzadeh:
Dynamic reconfiguration in sensor networks with regenerative energy sources.
DATE 2007: 1054-1059 |
| 205 | EE | Tia Gao,
Tammara Massey,
Majid Sarrafzadeh,
Leo Selavo,
Matt Welsh:
Participatory user centered design techniques for a large scale ad-hoc health information system.
HealthNet 2007: 43-48 |
| 204 | EE | Roozbeh Jafari,
Soheil Ghiasi,
Majid Sarrafzadeh:
Medical Embedded Systems.
IESS 2007: 441-444 |
| 203 | EE | Foad Dabiri,
Roozbeh Jafari,
Ani Nahapetian,
Majid Sarrafzadeh:
A Unified Optimal Voltage Selection Methodology for Low-Power Systems.
ISQED 2007: 210-218 |
| 202 | EE | Taraneh Taghavi,
Ani Nahapetian,
Majid Sarrafzadeh:
System Level Estimation of Interconnect Length in the Presence of IP Blocks.
ISQED 2007: 438-443 |
| 201 | EE | Taraneh Taghavi,
Majid Sarrafzadeh:
Hierarchical Concurrent Congestion and Wirelength Estimation in the Presence of IP Blocks.
ISVLSI 2007: 213-218 |
| 200 | EE | Foad Dabiri,
Ani Nahapetian,
Miodrag Potkonjak,
Majid Sarrafzadeh:
Soft Error-Aware Power Optimization Using Gate Sizing.
PATMOS 2007: 255-267 |
| 199 | EE | Ani Nahapetian,
Foad Dabiri,
Miodrag Potkonjak,
Majid Sarrafzadeh:
Optimization for Real-Time Systems with Non-convex Power Versus Speed Models.
PATMOS 2007: 443-452 |
| 198 | EE | Philip Brisk,
Majid Sarrafzadeh:
Interference graphs for procedures in static single information form are interval graphs.
SCOPES 2007: 101-110 |
| 197 | EE | Taraneh Taghavi,
Foad Dabiri,
Ani Nahapetian,
Majid Sarrafzadeh:
Tutorial on congestion prediction.
SLIP 2007: 15-24 |
| 2006 |
|---|
| 196 | EE | Ryan Kastner,
Wenrui Gong,
Xin Hao,
Forrest Brewer,
Adam Kaplan,
Philip Brisk,
Majid Sarrafzadeh:
Layout driven data communication optimization for high level synthesis.
DATE 2006: 1185-1190 |
| 195 | EE | Ani Nahapetian,
Foad Dabiri,
Majid Sarrafzadeh:
Energy Minimization and Reliability for Wearable Medical Applications.
ICPP Workshops 2006: 309-318 |
| 194 | EE | Taraneh Taghavi,
Soheil Ghiasi,
Majid Sarrafzadeh:
Routing algorithms: architecture driven rerouting enhancement for FPGAs.
ISCAS 2006 |
| 193 | EE | Majid Sarrafzadeh,
Foad Dabiri,
Roozbeh Jafari,
Tammara Massey,
Ani Nahapetian:
Low power light-weight embedded systems.
ISLPED 2006: 207-212 |
| 192 | EE | Taraneh Taghavi,
Xiaojian Yang,
Bo-Kyung Choi,
Maogang Wang,
Majid Sarrafzadeh:
Dragon2006: blockage-aware congestion-controlling mixed-size placer.
ISPD 2006: 209-211 |
| 191 | EE | Roozbeh Jafari,
Hyduke Noshadi,
Majid Sarrafzadeh,
Soheil Ghiasi:
Adaptive Medical Feature Extraction for Resource Constrained Distributed Embedded Systems.
PerCom Workshops 2006: 506-511 |
| 190 | EE | Roozbeh Jafari,
Hyduke Noshadi,
Soheil Ghiasi,
Majid Sarrafzadeh:
Adaptive Electrocardiogram Feature Extraction on Distributed Embedded Systems.
IEEE Trans. Parallel Distrib. Syst. 17(8): 797-807 (2006) |
| 189 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Po-Kuan Huang,
Roozbeh Jafari,
Majid Sarrafzadeh:
A Unified Theory of Timing Budget Management.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2364-2375 (2006) |
| 188 | EE | Philip Brisk,
Foad Dabiri,
Roozbeh Jafari,
Majid Sarrafzadeh:
Optimal register sharing for high-level synthesis of SSA form programs.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 772-779 (2006) |
| 187 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Karlene Nguyen,
Majid Sarrafzadeh:
Efficient Timing Budget Management for Accuracy Improvement in a Collaborative Object Tracking System.
VLSI Signal Processing 42(1): 43-55 (2006) |
| 2005 |
|---|
| 186 | EE | Taraneh Taghavi,
Soheil Ghiasi,
Majid Sarrafzadeh:
Routing algorithms: enhancing routability & enabling ECO (abstract only).
FPGA 2005: 266 |
| 185 | EE | Roozbeh Jafari,
Seda Ogrenci Memik,
Majid Sarrafzadeh:
Quick Reconfiguration in Clustered Micro-Sequencer.
IPDPS 2005 |
| 184 | EE | Philip Brisk,
Jamie Macbeth,
Ani Nahapetian,
Majid Sarrafzadeh:
A dictionary construction technique for code compression systems with echo instructions.
LCTES 2005: 105-114 |
| 183 | EE | Roozbeh Jafari,
Andre Encarnacao,
Azad Zahoory,
Foad Dabiri,
Hyduke Noshadi,
Majid Sarrafzadeh:
Wireless Sensor Networks for Health Monitoring.
MobiQuitous 2005: 479-781 |
| 182 | EE | Roozbeh Jafari,
Foad Dabiri,
Majid Sarrafzadeh:
An Efficient Placement and Routing Technique for Fault-Tolerant Distributed Embedded Computing.
RTCSA 2005: 135-143 |
| 181 | EE | Roozbeh Jafari,
Foad Dabiri,
Philip Brisk,
Majid Sarrafzadeh:
Adaptive and fault tolerant medical vest for life-critical medical monitoring.
SAC 2005: 272-279 |
| 180 | EE | Roozbeh Jafari,
Foad Dabiri,
Bo-Kyung Choi,
Majid Sarrafzadeh:
Efficient placement and routing in grid-based networks.
SAC 2005: 899-900 |
| 179 | EE | Seda Ogrenci Memik,
Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
A scheduling algorithm for optimization and early planning in high-level synthesis.
ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005) |
| 178 | EE | Ankur Srivastava,
Seda Ogrenci Memik,
Bo-Kyung Choi,
Majid Sarrafzadeh:
On effective slack management in postscheduling phase.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 645-653 (2005) |
| 177 | EE | Roozbeh Jafari,
Foad Dabiri,
Majid Sarrafzadeh:
Epsilon-Optimal Minimal-Skew Battery Lifetime Routing in Distributed Embedded Systems.
J. Low Power Electronics 1(2): 97-107 (2005) |
| 2004 |
|---|
| 176 | EE | Philip Brisk,
Adam Kaplan,
Majid Sarrafzadeh:
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs.
DAC 2004: 395-400 |
| 175 | | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Incremental Timing Budget Management in Programmable Systems.
ERSA 2004: 240-246 |
| 174 | EE | Soheil Ghiasi,
Elaheh Bozorgzadeh,
Siddharth Choudhuri,
Majid Sarrafzadeh:
A unified theory of timing budget management.
ICCAD 2004: 653-659 |
| 173 | | Bo-Kyung Choi,
Charles Chiang,
Jamil Kawa,
Majid Sarrafzadeh:
Routing resources consumption on M-arch and X-arch.
ISCAS (5) 2004: 73-76 |
| 172 | EE | Taraneh Taghavi,
Soheil Ghiasi,
Abhishek Ranjan,
Salil Raje,
Majid Sarrafzadeh:
Innovate or perish: FPGA physical design.
ISPD 2004: 148-155 |
| 171 | EE | Eren Kursun,
Soheil Ghiasi,
Majid Sarrafzadeh:
Transistor Level Budgeting for Power Optimization.
ISQED 2004: 116-121 |
| 170 | EE | Philip Brisk,
Ani Nahapetian,
Majid Sarrafzadeh:
Instruction Selection for Compilers that Target Architectures with Echo Instructions.
SCOPES 2004: 229-243 |
| 169 | EE | Soheil Ghiasi,
Ani Nahapetian,
Majid Sarrafzadeh:
An optimal algorithm for minimizing run-time reconfiguration delay.
ACM Trans. Embedded Comput. Syst. 3(2): 237-256 (2004) |
| 168 | | Ankur Srivastava,
Ryan Kastner,
Chunhong Chen,
Majid Sarrafzadeh:
Timing driven gate duplication.
IEEE Trans. VLSI Syst. 12(1): 42-51 (2004) |
| 167 | EE | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Optimal integer delay-budget assignment on directed acyclic graphs.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1184-1199 (2004) |
| 166 | EE | Elaheh Bozorgzadeh,
Seda Ogrenci Memik,
Xiaojian Yang,
Majid Sarrafzadeh:
Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs.
Journal of Circuits, Systems, and Computers 13(1): 77-100 (2004) |
| 165 | EE | Soheil Ghiasi,
Hyun J. Moon,
Ani Nahapetian,
Majid Sarrafzadeh:
Collaborative and Reconfigurable Object Tracking.
The Journal of Supercomputing 30(3): 213-238 (2004) |
| 2003 |
|---|
| 164 | EE | Elaheh Bozorgzadeh,
Soheil Ghiasi,
Atsushi Takahashi,
Majid Sarrafzadeh:
Optimal integer delay budgeting on directed acyclic graphs.
DAC 2003: 920-925 |
| 163 | | Soheil Ghiasi,
Hyun J. Moon,
Majid Sarrafzadeh:
Improving Performance and Quality thru Hardware Reconfiguration: Potentials and Adaptive Object Tracking Case Study.
ESTImedia 2003: 149-155 |
| 162 | | Soheil Ghiasi,
Hyun J. Moon,
Majid Sarrafzadeh:
Collaborative and Reconfigurable Object Tracking.
Engineering of Reconfigurable Systems and Algorithms 2003: 13-20 |
| 161 | EE | Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Customized regular channel design in FPGAs.
FPGA 2003: 240 |
| 160 | EE | Soheil Ghiasi,
Karlene Nguyen,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
On computation and resource management in an FPGA-based computation environment.
FPGA 2003: 243 |
| 159 | EE | Huaiyu Xu,
Maogang Wang,
Bo-Kyung Choi,
Majid Sarrafzadeh:
A Trade-off Oriented Placement Tool.
ICCAD 2003: 467-471 |
| 158 | EE | Ankur Srivastava,
Seda Ogrenci Memik,
Bo-Kyung Choi,
Majid Sarrafzadeh:
Achieving Design Closure Through Delay Relaxation Parameter.
ICCAD 2003: 54-57 |
| 157 | EE | Bo-Kyung Choi,
Huaiyu Xu,
Maogang Wang,
Majid Sarrafzadeh:
Flow-Based Cell Moving Algorithm for Desired Cell Distribution.
ICCD 2003: 218- |
| 156 | EE | Xiaojian Yang,
Maogang Wang,
Ryan Kastner,
Soheil Ghiasi,
Majid Sarrafzadeh:
Congestion reduction during placement with provably good approximation bound.
ACM Trans. Design Autom. Electr. Syst. 8(3): 316-333 (2003) |
| 155 | EE | Seda Ogrenci Memik,
Aggelos K. Katsaggelos,
Majid Sarrafzadeh:
Analysis and FPGA Implementation of Image Restoration under Resource Constraints.
IEEE Trans. Computers 52(3): 390-399 (2003) |
| 154 | EE | Xiaojian Yang,
Bo-Kyung Choi,
Majid Sarrafzadeh:
Routability-driven white space allocation for fixed-die standard-cell placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 410-419 (2003) |
| 153 | EE | Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
Creating and exploiting flexibility in rectilinear Steiner trees.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 605-615 (2003) |
| 2002 |
|---|
| 152 | EE | Philip Brisk,
Adam Kaplan,
Ryan Kastner,
Majid Sarrafzadeh:
Instruction generation and regularity extraction for reconfigurable processors.
CASES 2002: 262-269 |
| 151 | EE | Chunhong Chen,
Majid Sarrafzadeh:
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis.
DATE 2002: 1016-1020 |
| 150 | EE | Ankur Srivastava,
Majid Sarrafzadeh:
Predictability: definition, ananlysis and optimization.
ICCAD 2002: 118-121 |
| 149 | EE | Xiaojian Yang,
Bo-Kyung Choi,
Majid Sarrafzadeh:
Timing-driven placement using design hierarchy guided constraint generation.
ICCAD 2002: 177-180 |
| 148 | EE | Xiaojian Yang,
Bo-Kyung Choi,
Majid Sarrafzadeh:
A Standard-Cell Placement Tool for Designs with High Row Utilization.
ICCD 2002: 45- |
| 147 | EE | Eren Kursun,
Ankur Srivastava,
Seda Ogrenci Memik,
Majid Sarrafzadeh:
Early evaluation techniques for low power binding.
ISLPED 2002: 160-165 |
| 146 | EE | Chunhong Chen,
Changjun Kang,
Majid Sarrafzadeh:
Activity-sensitive clock tree construction for low power.
ISLPED 2002: 279-282 |
| 145 | EE | Xiaojian Yang,
Bo-Kyung Choi,
Majid Sarrafzadeh:
Routability driven white space allocation for fixed-die standard-cell placement.
ISPD 2002: 42-47 |
| 144 | | Ankur Srivastava,
Majid Sarrafzadeh:
Predictability: Definition, Analysis and Optimization.
IWLS 2002: 267-272 |
| 143 | EE | Ryan Kastner,
Christina Hsieh,
Miodrag Potkonjak,
Majid Sarrafzadeh:
On the Sensitivity of Incremental Algorithms for Combinatorial Auctions.
WECWIS 2002: 81-88 |
| 142 | EE | Majid Sarrafzadeh,
Rajeev Jayaraman:
Guest editorial.
ACM Trans. Design Autom. Electr. Syst. 7(4): 499-500 (2002) |
| 141 | EE | Chunhong Chen,
Elaheh Bozorgzadeh,
Ankur Srivastava,
Majid Sarrafzadeh:
Budget Management with Applications.
Algorithmica 34(3): 261-275 (2002) |
| 140 | EE | Xiaojian Yang,
Ryan Kastner,
Majid Sarrafzadeh:
Congestion estimation during top-down placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(1): 72-80 (2002) |
| 139 | EE | Chunhong Chen,
Xiaojian Yang,
Majid Sarrafzadeh:
Predicting potential performance for digital circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(3): 253-262 (2002) |
| 138 | EE | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Pattern routing: use and theory for increasing predictability andavoiding coupling.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 777-790 (2002) |
| 137 | EE | Ankur Srivastava,
Eren Kursun,
Majid Sarrafzadeh:
Predictability in RT-Level Designs.
Journal of Circuits, Systems, and Computers 11(4): 323-332 (2002) |
| 2001 |
|---|
| 136 | EE | Abhishek Ranjan,
Ankur Srivastava,
V. Karnam,
Majid Sarrafzadeh:
Layout aware retiming.
ACM Great Lakes Symposium on VLSI 2001: 25-30 |
| 135 | EE | Ankur Srivastava,
Chunhong Chen,
Majid Sarrafzadeh:
Timing driven gate duplication in technology independent phase.
ASP-DAC 2001: 577-582 |
| 134 | EE | Elaheh Bozorgzadeh,
Seda Ogrenci Memik,
Majid Sarrafzadeh:
RPack: routability-driven packing for cluster-based FPGAs.
ASP-DAC 2001: 629-634 |
| 133 | EE | Patrick Schaumont,
Ingrid Verbauwhede,
Kurt Keutzer,
Majid Sarrafzadeh:
A Quick Safari Through the Reconfiguration Jungle.
DAC 2001: 172-177 |
| 132 | EE | Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
Creating and Exploiting Flexibility in Steiner Trees.
DAC 2001: 195-198 |
| 131 | EE | Kia Bazargan,
Seda Ogrenci,
Majid Sarrafzadeh:
Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures.
DAC 2001: 635-640 |
| 130 | EE | Ryan Kastner,
Seda Ogrenci Memik,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Instruction Generation for Hybrid Reconfigurable Systems.
ICCAD 2001: 127- |
| 129 | EE | Seda Ogrenci Memik,
Elaheh Bozorgzadeh,
Ryan Kastner,
Majid Sarrafzadeh:
A Super-Scheduler for Embedded Reconfigurable Systems.
ICCAD 2001: 391- |
| 128 | EE | Xiaojian Yang,
Ryan Kastner,
Majid Sarrafzadeh:
Congestion Reduction During Placement Based on Integer Programming.
ICCAD 2001: 573-576 |
| 127 | EE | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
An exact algorithm for coupling-free routing.
ISPD 2001: 10-15 |
| 126 | EE | Xiaojian Yang,
Ryan Kastner,
Majid Sarrafzadeh:
Congestion estimation during top-down placement.
ISPD 2001: 164-169 |
| 125 | EE | Nancy Nettleton,
Wolfgang Roethig,
D. Hill,
Majid Sarrafzadeh:
Differences in ASIC, COT and processor design (panel).
ISPD 2001: 2 |
| 124 | EE | Majid Sarrafzadeh,
Elaheh Bozorgzadeh,
Ryan Kastner,
Ankur Srivastava:
Design and analysis of physical design algorithms.
ISPD 2001: 82-89 |
| 123 | EE | Xiaojian Yang,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Wirelength estimation based on rent exponents of partitioning and placement.
SLIP 2001: 25-31 |
| 122 | EE | Abhishek Ranjan,
Kia Bazargan,
S. Ogrenci,
Majid Sarrafzadeh:
Fast floorplanning for effective prediction and construction.
IEEE Trans. VLSI Syst. 9(2): 341-351 (2001) |
| 121 | EE | Chunhong Chen,
Ankur Srivastava,
Majid Sarrafzadeh:
On gate level power optimization using dual-supply voltages.
IEEE Trans. VLSI Syst. 9(5): 616-629 (2001) |
| 120 | EE | Amir H. Farrahi,
Chunhong Chen,
Ankur Srivastava,
Gustavo E. Téllez,
Majid Sarrafzadeh:
Activity-driven clock design.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(6): 705-714 (2001) |
| 119 | EE | Ankur Srivastava,
Ryan Kastner,
Majid Sarrafzadeh:
On the complexity of gate duplication.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1170-1176 (2001) |
| 2000 |
|---|
| 118 | | Majid Sarrafzadeh,
Prithviraj Banerjee,
Kaushik Roy:
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000
ACM 2000 |
| 117 | EE | Kia Bazargan,
Abhishek Ranjan,
Majid Sarrafzadeh:
Fast and accurate estimation of floorplans in logic/high-level synthesis.
ACM Great Lakes Symposium on VLSI 2000: 95-100 |
| 116 | EE | Maogang Wang,
Majid Sarrafzadeh:
Modeling and minimization of routing congestion.
ASP-DAC 2000: 185-190 |
| 115 | EE | Chunhong Chen,
Majid Sarrafzadeh:
Power reduction by simultaneous voltage scaling and gate sizing.
ASP-DAC 2000: 333-338 |
| 114 | EE | Maogang Wang,
Sung Lim,
Jason Cong,
Majid Sarrafzadeh:
Multi-way partitioning using bi-partition heuristics.
ASP-DAC 2000: 667 |
| 113 | EE | Kia Bazargan,
Ryan Kastner,
Seda Ogrenci,
Majid Sarrafzadeh:
A C to Hardware/Software Compiler.
FCCM 2000: 331-332 |
| 112 | EE | F. S. Ogrenci,
Aggelos K. Katsaggelos,
Majid Sarrafzadeh:
FPGA implementation and analysis of image restoration.
FPGA 2000: 219 |
| 111 | | Ryan Kastner,
Elaheh Bozorgzadeh,
Majid Sarrafzadeh:
Predictable Routing.
ICCAD 2000: 110-113 |
| 110 | | Chunhong Chen,
Xiaojian Yang,
Majid Sarrafzadeh:
Potential Slack: An Effective Metric of Combinational Circuit Performance.
ICCAD 2000: 198-201 |
| 109 | | Olivier Coudert,
Jason Cong,
Sharad Malik,
Majid Sarrafzadeh:
Incremental CAD.
ICCAD 2000: 236-243 |
| 108 | | Maogang Wang,
Xiaojian Yang,
Majid Sarrafzadeh:
DRAGON2000: Standard-Cell Placement Tool for Large Industry Circuits.
ICCAD 2000: 260-263 |
| 107 | | Ankur Srivastava,
Ryan Kastner,
Majid Sarrafzadeh:
Timing Driven Gate Duplication: Complexity Issues and Algorithms.
ICCAD 2000: 447-450 |
| 106 | EE | Abhishek Ranjan,
Kia Bazargan,
Majid Sarrafzadeh:
Fast Hierarchical Floorplanning with Congestion and Timing Control.
ICCD 2000: 357-362 |
| 105 | EE | Maogang Wang,
Xiaojian Yang,
Kenneth Eguro,
Majid Sarrafzadeh:
Multi-center congestion estimation and minimization during placement.
ISPD 2000: 147-152 |
| 104 | EE | Xiaojian Yang,
Maogang Wang,
Kenneth Eguro,
Majid Sarrafzadeh:
A snap-on placement tool.
ISPD 2000: 153-158 |
| 103 | EE | Jason Cong,
Majid Sarrafzadeh:
Incremental physical design.
ISPD 2000: 84-92 |
| 102 | EE | Amir H. Farrahi,
David J. Hathaway,
Maogang Wang,
Majid Sarrafzadeh:
Quality of EDA CAD Tools: Definitions, Metrics and Directions.
ISQED 2000: 395-406 |
| 101 | EE | Kia Bazargan,
Ryan Kastner,
Majid Sarrafzadeh:
Fast Template Placement for Reconfigurable Computing Systems.
IEEE Design & Test of Computers 17(1): 68-83 (2000) |
| 100 | EE | Maogang Wang,
Xiaojian Yang,
Majid Sarrafzadeh:
Congestion minimization during placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1140-1148 (2000) |
| 99 | EE | Melvin A. Breuer,
Majid Sarrafzadeh,
Fabio Somenzi:
Fundamental CAD algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1449-1475 (2000) |
| 98 | EE | Michael F. Gorman,
Majid Sarrafzadeh:
An application of dynamic programming to crew balancing at Burlington Northern Santa Fe Railway.
IJSTM 1(2/3): 174-187 (2000) |
| 97 | | Wei-Liang Lin,
Amir H. Farrahi,
Majid Sarrafzadeh:
On the Power of Logic Resynthesis.
SIAM J. Comput. 29(4): 1257-1289 (2000) |
| 1999 |
|---|
| 96 | EE | Kiarash Barzagan,
Majid Sarrafzadeh:
Fast Online Placement for Reconfigurable Computing.
FCCM 1999: 300- |
| 95 | EE | Jim E. Crenshaw,
Majid Sarrafzadeh,
Prithviraj Banerjee,
Pradeep Prabhakaran:
An Incremental Floorplanner.
Great Lakes Symposium on VLSI 1999: 248-251 |
| 94 | EE | Chunhong Chen,
Majid Sarrafzadeh:
Provably good algorithm for low power consumption with dual supply voltages.
ICCAD 1999: 76-79 |
| 93 | EE | Chunhong Chen,
Majid Sarrafzadeh:
An Effective Algorithm for Gate-Level Power-Delay Tradeoff Using Two Voltages.
ICCD 1999: 222- |
| 92 | EE | Kia Bazargan,
Ryan Kastner,
Majid Sarrafzadeh:
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems.
IEEE International Workshop on Rapid System Prototyping 1999: 38- |
| 91 | EE | Majid Sarrafzadeh,
Salil Raje:
Scheduling with multiple voltages under resource constraints.
ISCAS (1) 1999: 350-353 |
| 90 | EE | Maogang Wang,
Majid Sarrafzadeh:
On the behavior of congestion minimization during placement.
ISPD 1999: 145-150 |
| 89 | EE | Pradeep Prabhakaran,
Prithviraj Banerjee,
Jim E. Crenshaw,
Majid Sarrafzadeh:
Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization.
VLSI Design 1999: 423-427 |
| 88 | EE | S. Nicoloso,
Majid Sarrafzadeh,
X. Song:
On the Sum Coloring Problem on Interval Graphs.
Algorithmica 23(2): 109-126 (1999) |
| 87 | EE | Amir H. Farrahi,
D. T. Lee,
Majid Sarrafzadeh:
Two-Way and Multiway Partitioning of a Set of Intervals for Clique-Width Maximization.
Algorithmica 23(3): 187-210 (1999) |
| 86 | EE | Kia Bazargan,
Samjung Kim,
Majid Sarrafzadeh:
Nostradamus: a floorplanner of uncertain designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(4): 389-397 (1999) |
| 85 | EE | Morgan Enos,
Scott Hauck,
Majid Sarrafzadeh:
Evaluation and optimization of replication algorithms for logic bipartitioning.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1237-1248 (1999) |
| 1998 |
|---|
| 84 | EE | Maogang Wang,
Prithviraj Banerjee,
Majid Sarrafzadeh:
Potential-NRG: Placement with Incomplete Data.
DAC 1998: 279-282 |
| 83 | EE | Jim E. Crenshaw,
Majid Sarrafzadeh:
Low Power Driven Scheduling and Binding.
Great Lakes Symposium on VLSI 1998: 406-413 |
| 82 | EE | Kia Bazargan,
Samjung Kim,
Majid Sarrafzadeh:
Nostradamus: a floorplanner of uncertain design.
ISPD 1998: 18-23 |
| 81 | EE | Sumit Roy,
Prithviraj Banerjee,
Majid Sarrafzadeh:
Partitioning sequential circuits for low power.
VLSI Design 1998: 212-217 |
| 80 | | Jun Dong Cho,
Salil Raje,
Majid Sarrafzadeh:
Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering vor VLSI Applications.
IEEE Trans. Computers 47(11): 1253-1266 (1998) |
| 79 | | Majid Sarrafzadeh,
Wei-Liang Lin,
C. K. Wong:
Floating Steiner Trees.
IEEE Trans. Computers 47(2): 197-211 (1998) |
| 78 | EE | Andrew B. Kahng,
Majid Sarrafzadeh:
Guest Editorial.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 1-2 (1998) |
| 77 | EE | Jun Dong Cho,
Majid Sarrafzadeh:
Four-bend top-down global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 793-802 (1998) |
| 1997 |
|---|
| 76 | EE | Majid Sarrafzadeh,
David A. Knol,
Gustavo E. Téllez:
Unification of Budgeting and Placement.
DAC 1997: 758-761 |
| 75 | EE | Morgan Enos,
Scott Hauck,
Majid Sarrafzadeh:
Replication for logic bipartitioning.
ICCAD 1997: 342-349 |
| 74 | EE | Majid Sarrafzadeh,
Maogang Wang:
NRG: global and detailed placement.
ICCAD 1997: 532-537 |
| 73 | EE | Majid Sarrafzadeh,
David A. Knol,
Gustavo E. Téllez:
A delay budgeting algorithm ensuring maximum flexibility in placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1332-1341 (1997) |
| 72 | EE | Gustavo E. Téllez,
Majid Sarrafzadeh:
Minimal buffer insertion in clock trees with skew and slew rate constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(4): 333-342 (1997) |
| 71 | EE | Salil Raje,
Majid Sarrafzadeh:
Scheduling with multiple voltages.
Integration 23(1): 37-59 (1997) |
| 1996 |
|---|
| 70 | EE | De-Sheng Chen,
Majid Sarrafzadeh:
An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing.
DAC 1996: 783-788 |
| 1995 |
|---|
| 69 | EE | Elof Frank,
Salil Raje,
Majid Sarrafzadeh:
Constrained Register Allocation in Bus Architectures.
DAC 1995: 170-175 |
| 68 | EE | Amir H. Farrahi,
Gustavo E. Téllez,
Majid Sarrafzadeh:
Memory Segmentation to Exploit Sleep Mode Operation.
DAC 1995: 36-41 |
| 67 | EE | Amir H. Farrahi,
Majid Sarrafzadeh:
System partitioning to maximize sleep time.
ICCAD 1995: 452-455 |
| 66 | EE | Gustavo E. Téllez,
Amir H. Farrahi,
Majid Sarrafzadeh:
Activity-driven clock design for low power circuits.
ICCAD 1995: 62-65 |
| 65 | | Gustavo E. Téllez,
Majid Sarrafzadeh:
On Rectilinear Distance-Preserving Trees.
ISCAS 1995: 163-166 |
| 64 | | De-Sheng Chen,
Majid Sarrafzadeh,
Gary K. H. Yeap:
State Encoding of Finite State Machines for Low Power Design.
ISCAS 1995: 2309-2312 |
| 63 | | Wei-Liang Lin,
Majid Sarrafzadeh:
A Linear Arrangement Problem with Applications.
ISCAS 1995: 57-60 |
| 62 | EE | Salil Raje,
Majid Sarrafzadeh:
Variable voltage scheduling.
ISLPD 1995: 9-14 |
| 61 | EE | Malgorzata Marek-Sadowska,
Majid Sarrafzadeh:
The crossing distribution problem [IC layout].
IEEE Trans. on CAD of Integrated Circuits and Systems 14(4): 423-433 (1995) |
| 60 | EE | Gary K. H. Yeap,
Majid Sarrafzadeh:
Sliceable Floorplanning by Graph Dualization.
SIAM J. Discrete Math. 8(2): 258-280 (1995) |
| 59 | EE | Majid Sarrafzadeh,
Sanjeev R. Maddila:
Discrete Warehouse Problem.
Theor. Comput. Sci. 140(2): 231-247 (1995) |
| 1994 |
|---|
| 58 | | Jun Dong Cho,
Salil Raje,
Majid Sarrafzadeh:
Approximation Algorithm on Multi-Way Maxcut Partitioning.
ESA 1994: 148-158 |
| 57 | | Amir H. Farrahi,
Majid Sarrafzadeh:
FPGA Technology Mapping for Power Minimization.
FPL 1994: 66-77 |
| 56 | EE | Gustavo E. Téllez,
Majid Sarrafzadeh:
Clock period constrained minimal buffer insertion in clock trees.
ICCAD 1994: 219-223 |
| 55 | EE | Wei-Liang Lin,
Majid Sarrafzadeh,
Chak-Kuen Wong:
The reproducing placement problem with applications.
ICCAD 1994: 686-689 |
| 54 | | Yoji Kajitani,
Jun Dong Cho,
Majid Sarrafzadeh:
New Approximation Results on Graph Matching and related Problems.
WG 1994: 343-358 |
| 53 | | Majid Sarrafzadeh,
Dorothea Wagner,
Frank Wagner,
Karsten Weihe:
Wiring Knock-Knee Layouts: A Global Approach.
IEEE Trans. Computers 43(5): 581-589 (1994) |
| 52 | EE | Majid Sarrafzadeh,
Kuo-Feng Liao,
Chak-Kuen Wong:
Single-layer global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 38-47 (1994) |
| 51 | EE | Amir H. Farrahi,
Majid Sarrafzadeh:
Complexity of the lookup-table minimization problem for FPGA technology mapping.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(11): 1319-1332 (1994) |
| 50 | EE | Charles Chiang,
Chak-Kuen Wong,
Majid Sarrafzadeh:
A weighted Steiner tree-based global router with simultaneous length and density minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1461-1469 (1994) |
| 49 | EE | Kuo-Feng Liao,
Majid Sarrafzadeh:
Correction to "Boundary single-layer routing with movable terminals".
IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 638 (1994) |
| 48 | | Majid Sarrafzadeh,
D. T. Lee:
Restricted track assignment with applications.
Int. J. Comput. Geometry Appl. 4(1): 53-68 (1994) |
| 47 | | Jun Dong Cho,
Majid Sarrafzadeh:
The pin redistribution problem in multi-chip modules.
Math. Program. 63: 297-330 (1994) |
| 1993 |
|---|
| 46 | EE | Jun Dong Cho,
Majid Sarrafzadeh:
A Nuffer Distribution Algorithm for High-Speed Clock Routing.
DAC 1993: 537-543 |
| 45 | EE | Majid Sarrafzadeh:
Transforming an arbitrary floorplan into a sliceable one.
ICCAD 1993: 386-389 |
| 44 | | Charles J. Alpert,
Jason Cong,
Andrew B. Kahng,
Gabriel Robins,
Majid Sarrafzadeh:
Minimum Density Interconneciton Trees.
ISCAS 1993: 1865-1868 |
| 43 | | Salil Raje,
Majid Sarrafzadeh:
GEM: A Geometric Algorithm for Scheduling.
ISCAS 1993: 1991-1994 |
| 42 | | Yachyang Sun,
Majid Sarrafzadeh:
Floorplanning by Graph Dualization: L-shaped Modules.
Algorithmica 10(6): 429-456 (1993) |
| 41 | | Majid Sarrafzadeh,
Ruey-Der Lou:
Maximum k-Covering of Weighted Transitive Graphs with Applications.
Algorithmica 9(1): 84-100 (1993) |
| 40 | EE | Jun Dong Cho,
Majid Sarrafzadeh,
Mysore Sriram,
Sung-Mo Kang:
High-Performance MCM Routing.
IEEE Design & Test of Computers 10(4): 27-37 (1993) |
| 39 | EE | Jan-Ming Ho,
Atsushi Suzuki,
Majid Sarrafzadeh:
An exact algorithm for single-layer wire length minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(1): 175-180 (1993) |
| 38 | EE | Gary K. H. Yeap,
Majid Sarrafzadeh:
A unified approach to floorplan sizing and enumeration.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1858-1867 (1993) |
| 37 | EE | Nancy D. Holmes,
Naveed A. Sherwani,
Majid Sarrafzadeh:
Utilization of vacant terminals for improved over-the-cell channel routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(6): 780-792 (1993) |
| 36 | | D. T. Lee,
Majid Sarrafzadeh:
Maximum independent set of a permutation graph in K tracks.
Int. J. Comput. Geometry Appl. 3(3): 291-304 (1993) |
| 35 | | Kok-Hoo Yeap,
Majid Sarrafzadeh:
Floor-Planning by Graph Dualization: 2-Concave Rectilinear Modules.
SIAM J. Comput. 22(3): 500-526 (1993) |
| 34 | | Ruey-Der Lou,
Majid Sarrafzadeh:
An Optimal Algorithm for the Maximum Three-Chain Problem.
SIAM J. Comput. 22(5): 976-993 (1993) |
| 1992 |
|---|
| 33 | EE | Sivakumar Natarajan,
Naveed A. Sherwani,
Nancy D. Holmes,
Majid Sarrafzadeh:
Over-the-Cell Channel Routing for High Performance Circuits.
DAC 1992: 600-603 |
| 32 | EE | Bo Wu,
Naveed A. Sherwani,
Nancy D. Holmes,
Majid Sarrafzadeh:
Over-the-Cell Routers for New Cell Model.
DAC 1992: 604-607 |
| 31 | EE | De-Sheng Chen,
Majid Sarrafzadeh:
A wire-length minimization algorithm for single-layer layouts.
ICCAD 1992: 390-393 |
| 30 | | Majid Sarrafzadeh,
Dorothea Wagner,
Frank Wagner,
Karsten Weihe:
Wiring Knock-Knee Layouts: A Global Appoach.
ISAAC 1992: 388-399 |
| 29 | | Majid Sarrafzadeh,
D. T. Lee:
Rstricted Track Assignment with Applications.
ISAAC 1992: 449-458 |
| 28 | | Ruey-Der Lou,
Majid Sarrafzadeh:
Circular Permutation Graph Family with Applications.
Discrete Applied Mathematics 40(4): 433-457 (1992) |
| 27 | | Majid Sarrafzadeh,
C. K. Wong:
Bottleneck Steiner Trees in the Plane.
IEEE Trans. Computers 41(3): 370-374 (1992) |
| 26 | EE | Jason Cong,
Andrew B. Kahng,
Gabriel Robins,
Majid Sarrafzadeh,
Chak-Kuen Wong:
Provably good performance-driven global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(6): 739-752 (1992) |
| 25 | EE | Majid Sarrafzadeh,
Chak-Kuen Wong:
Hierarchical Steiner tree construction in uniform orientations.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1095-1103 (1992) |
| 24 | | Ruey-Der Lou,
Majid Sarrafzadeh,
Chong S. Rim,
Kazuo Nakajima,
Sumio Masuda:
General Circular Permutation Layout.
Mathematical Systems Theory 25(4): 269-292 (1992) |
| 23 | | Ruey-Der Lou,
Majid Sarrafzadeh,
D. T. Lee:
An Optimal Algorithm for the Maximum Two-Chain Problem.
SIAM J. Discrete Math. 5(2): 285-304 (1992) |
| 1991 |
|---|
| 22 | EE | Nancy D. Holmes,
Naveed A. Sherwani,
Majid Sarrafzadeh:
New Algorithm for Over-the-Cell Channel Routing Using Vacant Terminals.
DAC 1991: 126-131 |
| 21 | | Nancy D. Holmes,
Naveed A. Sherwani,
Majid Sarrafzadeh:
Algorithms for Three-Layer Over-The-Cell Channel Routing.
ICCAD 1991: 428-431 |
| 20 | | Malgorzata Marek-Sadowska,
Majid Sarrafzadeh:
The Crossing Distribution Problem.
ICCAD 1991: 528-531 |
| 19 | | Jason Cong,
Andrew B. Kahng,
Gabriel Robins,
Majid Sarrafzadeh,
C. K. Wong:
Performance-Driven Global Routing for Cell Based ICs.
ICCD 1991: 170-173 |
| 18 | | D. T. Lee,
Majid Sarrafzadeh:
Maximum Independent Set of a Permutation Graph in k Tracks.
ISA 1991: 2-11 |
| 17 | | Majid Sarrafzadeh,
D. T. Lee:
Topological Via Minimization Revisited.
IEEE Trans. Computers 40(11): 1307-1312 (1991) |
| 16 | EE | Kuo-Feng Liao,
Majid Sarrafzadeh:
Boundary single-layer routing with movable terminals.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(11): 1382-1391 (1991) |
| 1990 |
|---|
| 15 | | Jan-Ming Ho,
Majid Sarrafzadeh,
Atsushi Suzuki:
An Exact Algorithm for Single-Layer Wire-Length Minimization.
ICCAD 1990: 424-427 |
| 14 | | Manbir Nag,
Majid Sarrafzadeh:
A Parallel Algorithm for Two-Layer Wirin.
ICPP (3) 1990: 278-285 |
| 13 | | Ruey-Der Lou,
Majid Sarrafzadeh,
D. T. Lee:
An Optimal Algorithm for the Maximum Two-Chain Problem.
SODA 1990: 149-158 |
| 12 | | Kuo-Feng Liao,
Majid Sarrafzadeh:
Vertex-Disjoint Trees and Boundary Single-Layer Routing.
WG 1990: 99-108 |
| 11 | | Martin L. Brady,
Majid Sarrafzadeh:
Stretching a Knock-Knee Layout for Multilayer Wiring.
IEEE Trans. Computers 39(1): 148-151 (1990) |
| 10 | | Majid Sarrafzadeh:
Area Minimization in a Three-Sided Switchbox by Sliding the Modules.
IEEE Trans. Computers 39(11): 1395-1403 (1990) |
| 9 | EE | Jan-Ming Ho,
Majid Sarrafzadeh,
Gopalakrishnan Vijayan,
Chak-Kuen Wong:
Layer assignment for multichip modules.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1272-1277 (1990) |
| 8 | EE | Charles Chiang,
Majid Sarrafzadeh,
Chak-Kuen Wong:
Global routing based on Steiner min-max trees.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1318-1325 (1990) |
| 7 | EE | Jan-Ming Ho,
Majid Sarrafzadeh,
Gopalakrishnan Vijayan,
Chak-Kuen Wong:
Pad minimization for planar routing of multiple power nets.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(4): 419-426 (1990) |
| 6 | | D. T. Lee,
Majid Sarrafzadeh,
Ying-Fung Wu:
Minimum Cuts for Circular-Arc Graphs.
SIAM J. Comput. 19(6): 1041-1050 (1990) |
| 1989 |
|---|
| 5 | EE | Gianfranco Bilardi,
Scot W. Hornick,
Majid Sarrafzadeh:
Optimal VLSI Architectures for Multidimensional DFT.
SPAA 1989: 265-272 |
| 4 | EE | Majid Sarrafzadeh,
D. T. Lee:
A new approach to topological via minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 890-900 (1989) |
| 1987 |
|---|
| 3 | | Scot W. Hornick,
Majid Sarrafzadeh:
On Problem Transformability in VLSI.
Algorithmica 2: 97-111 (1987) |
| 2 | EE | Majid Sarrafzadeh:
Channel-Routing Problem in the Knock-Knee Mode Is NP-Complete.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(4): 503-506 (1987) |
| 1986 |
|---|
| 1 | | Kurt Mehlhorn,
Franco P. Preparata,
Majid Sarrafzadeh:
Channel Routing in Knock-Knee Mode: Simplified Algorithms and Proofs.
Algorithmica 1(2): 213-221 (1986) |
