| 2008 |
|---|
| 38 | EE | Hyoung Jin Yun,
Jang Woong Park,
Myung Hoon Sunwoo:
Data-aided algorithm based frequency synchronizer for DVB-S2.
ICUIMC 2008: 354-358 |
| 37 | EE | Sung Dae Kim,
Myung Hoon Sunwoo:
ASIP Approach for Implementation of H.264/AVC.
Signal Processing Systems 50(1): 53-67 (2008) |
| 2007 |
|---|
| 36 | EE | Han Jae Hee,
Myung Hoon Sunwoo,
Jong Ha Moon:
Novel Non-linear Inverse Quantization Algorithm and its Architecture for Digital Audio Codecs.
ISCAS 2007: 357-360 |
| 35 | EE | Sung Dae Kim,
Myung Hoon Sunwoo:
Low Power ASIP Architecture Optimization based on Target Application Profiling.
ISCAS 2007: 3764-3767 |
| 34 | EE | Jaehyun Baek,
Myung Hoon Sunwoo:
Simplified Degree Computationless Modified Euclid's Algorithm and its Architecture.
ISCAS 2007: 905-908 |
| 2006 |
|---|
| 33 | EE | Sung Dae Kim,
Choong J. Hyun,
Myung Hoon Sunwoo:
VSIP : Implementation of Video Specific Instruction-set Processor.
APCCAS 2006: 1075-1078 |
| 32 | EE | Jang Woong Park,
Jae H. Baek,
Myung Hoon Sunwoo:
Enhanced Degree Computationless Modified Euclid's Algorithm.
APCCAS 2006: 305-308 |
| 31 | EE | Sung Dae Kim,
Jeong Hoo Lee,
Chung Jin Hyun,
Myung Hoon Sunwoo:
ASIP approach for implementation of H.264/AVC.
ASP-DAC 2006: 758-764 |
| 30 | EE | Jaehyun Baek,
Myung Hoon Sunwoo:
Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon decoder.
ISCAS 2006 |
| 29 | EE | Jae H. Baek,
Myung Hoon Sunwoo:
New degree computationless modified euclid algorithm and architecture for Reed-Solomon decoder.
IEEE Trans. VLSI Syst. 14(8): 915-920 (2006) |
| 28 | EE | Weon Heum Park,
Myung Hoon Sunwoo,
Seong Keun Oh:
Efficient DSP Architecture for Viterbi Decoding with Small Trace Back Latency.
IEICE Transactions 89-B(10): 2813-2818 (2006) |
| 2005 |
|---|
| 27 | EE | Suk Hyun Yoon,
Jong Ha Moon,
Myung Hoon Sunwoo:
Efficient DSP architecture for high-quality audio algorithms.
ISCAS (3) 2005: 2947-2950 |
| 26 | EE | Sung Dae Kim,
J. H. Lee,
J. M. Yang,
Myung Hoon Sunwoo,
Seung Keun Oh:
Novel instructions and their hardware architecture for video signal processing.
ISCAS (4) 2005: 3323-3326 |
| 25 | EE | Jaehyun Baek,
Ju Hyung Hong,
Myung Hoon Sunwoo:
Novel digital signal processing unit for Ethernet receiver.
ISCAS (5) 2005: 4477-4480 |
| 24 | EE | Myung Hoon Sunwoo,
Wonyong Sung:
Guest Editorial.
VLSI Signal Processing 40(3): 279-280 (2005) |
| 2004 |
|---|
| 23 | | Sung Dae Kim,
Sug Hyun Jeong,
Myung Hoon Sunwoo,
Kyung Ho Kim:
Novel bit manipulation unit for communication digital signal processors.
ISCAS (2) 2004: 385-388 |
| 22 | | Jeong Hoo Lee,
Jong Ha Moon,
Kyung Lan Heo,
Myung Hoon Sunwoo,
Seung Keun Oh,
In Ho Kim:
Implementation of application-specific DSP for OFDM systems.
ISCAS (3) 2004: 665-658 |
| 21 | EE | Myung Hoon Sunwoo,
Seong Keun Oh:
A Multiplierless 2-D Convolver Chip for Real-Time Image Processing.
VLSI Signal Processing 38(1): 63-71 (2004) |
| 2003 |
|---|
| 20 | EE | Kyung Lan Heo,
Sung M. Cho,
Jung Hoo Lee,
Myung Hoon Sunwoo:
Application-Specific DSP Architecture For Fast Fourier Transform.
ASAP 2003: 369-377 |
| 19 | EE | Jaehyun Baek,
Byung S. Son,
Byung G. Jo,
Myung Hoon Sunwoo,
Seung Keun Oh:
A continuous flow mixed-radix FFT architecture with an in-place algorithm.
ISCAS (2) 2003: 133-136 |
| 18 | EE | Jung Hoo Lee,
Weon Heum Park,
Ju Hyung Hong,
Myung Hoon Sunwoo,
Kyung Ho Kim:
A high-speed blind DFE equalizer using an error feedback filter for QAM modems.
ISCAS (4) 2003: 464-467 |
| 17 | EE | Jae Sung Lee,
Myung Hoon Sunwoo:
Design of New DSP Instructions and Their Hardware Architecture for High-Speed FFT.
VLSI Signal Processing 33(3): 247-254 (2003) |
| 2002 |
|---|
| 16 | EE | Byung S. Son,
Byung G. Jo,
Myung Hoon Sunwoo,
Yong Serk Kim:
A high-speed FFT processor for OFDM systems.
ISCAS (3) 2002: 281-284 |
| 15 | EE | Jung Hoo Lee,
Jae Sung Lee,
Myung Hoon Sunwoo,
Kyung Ho Kim:
Design of new DSP instructions and their hardware architecture for the Viterbi decoding algorithm.
ISCAS (5) 2002: 561-564 |
| 14 | EE | Jae H. Baek,
J. Y. Kang,
Myung Hoon Sunwoo:
Design of a high-speed Reed-Solomon decoder.
ISCAS (5) 2002: 793-796 |
| 2001 |
|---|
| 13 | EE | Byung G. Jo,
J. Y. Kang,
Myung Hoon Sunwoo:
A low power and area efficient FIR filter chip for PRML read channels.
ISCAS (4) 2001: 606-609 |
| 1999 |
|---|
| 12 | EE | Hyunman Chang,
Myung Hoon Sunwoo:
A low complexity Reed-Solomon architecture using the Euclid's algorithm.
ISCAS (1) 1999: 513-516 |
| 11 | EE | Soohwan Ong,
Hyunjune Yoo,
Myung Hoon Sunwoo:
A MDSP (multimedia DSP) chip for portable multimedia applications.
ISCAS (4) 1999: 283-286 |
| 1998 |
|---|
| 10 | | Sung Hyun Yoon,
Myung Hoon Sunwoo:
An Efficient Variable-Length Tap FIR Filter Chip.
ASP-DAC 1998: 157-161 |
| 9 | | Se Young Eun,
Myung Hoon Sunwoo:
An Effcient 2-D Convolver Chip for Real Time Image Processing.
ASP-DAC 1998: 329-330 |
| 8 | | Soohwan Ong,
Myung Hoon Sunwoo:
Implementation of a Sliding Memory Plane Image Processor.
J. Parallel Distrib. Comput. 55(2): 236-248 (1998) |
| 1997 |
|---|
| 7 | EE | Hyunman Chang,
Soohwan Ong,
Myung Hoon Sunwoo:
A Linear Array Parallel Image Processor: SliM-II.
ASAP 1997: 34-41 |
| 6 | EE | Hyunman Chang,
Changhee Lee,
Myung Hoon Sunwoo:
SliM-II: A Linear Array SIMD Processor for Real-time Image Processing.
ICPADS 1997: 132-137 |
| 1996 |
|---|
| 5 | EE | Hyun M. Chang,
Myung Hoon Sunwoo,
Tai-Hoon Cho:
Implementation of a SliM Array Processor.
IPPS 1996: 771-775 |
| 1995 |
|---|
| 4 | EE | Myung Hoon Sunwoo,
Soohwan Ong,
Byungdug Ahn,
Kyungwoo Lee:
Design and Implementation of a Parallel Image Processor Chip for a SIMD Array Processor.
ASAP 1995: 66-75 |
| 1993 |
|---|
| 3 | EE | Myung Hoon Sunwoo,
J. K. Aggarwal:
A Sliding Memory Plane Array Processor.
IEEE Trans. Parallel Distrib. Syst. 4(6): 601-612 (1993) |
| 1990 |
|---|
| 2 | | Myung Hoon Sunwoo,
J. K. Aggarwal:
Flexibly Coupled Multiprocessors for Image Processing.
J. Parallel Distrib. Comput. 10(2): 115-129 (1990) |
| 1988 |
|---|
| 1 | | Myung Hoon Sunwoo,
J. K. Aggarwal:
Flexibly Coupled Multiprocessors for Image Processing.
ICPP (1) 1988: 452-461 |
