Baris Taskin

List of publications from the DBLP Bibliography Server - FAQ

2006

5 EE Baris Taskin, Ivan S. Kourtev: Delay Insertion Method in Clock Skew Scheduling. IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 651-663 (2006)

2005

4 EE Baris Taskin, Ivan S. Kourtev: Delay insertion method in clock skew scheduling. ISPD 2005: 47-54

2004

3 Baris Taskin, Ivan S. Kourtev: Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuits. ISCAS (2) 2004: 617-620

2 Baris Taskin, Ivan S. Kourtev: Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. IEEE Trans. VLSI Syst. 12(1): 12-27 (2004)

2002

1 EE Baris Taskin, Ivan S. Kourtev: Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 111-118

2006
5	EE	Baris Taskin, Ivan S. Kourtev: Delay Insertion Method in Clock Skew Scheduling. IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 651-663 (2006)
2005
4	EE	Baris Taskin, Ivan S. Kourtev: Delay insertion method in clock skew scheduling. ISPD 2005: 47-54
2004
3		Baris Taskin, Ivan S. Kourtev: Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuits. ISCAS (2) 2004: 617-620
2		Baris Taskin, Ivan S. Kourtev: Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. IEEE Trans. VLSI Syst. 12(1): 12-27 (2004)
2002
1	EE	Baris Taskin, Ivan S. Kourtev: Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 111-118

Coauthor Index