Hao Zheng

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2008
17EEHao Zheng, Xian Wu, Yong Yu: Enriching WordNet with Folksonomies. PAKDD 2008: 1075-1080
2006
16EEMiao Xiong, Yifan Chen, Hao Zheng, Yong Yu: Towards Quick Understanding and Analysis of Large-Scale Ontologies. ASWC 2006: 84-98
15EEDi Mu, Tian Xia, Hao Zheng: Data Dependent Jitter Characterization Based on Fourier Analysis. DFT 2006: 534-544
14EEHao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda: Verification of timed circuits with failure-directed abstractions. IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 403-412 (2006)
2005
13EETian Xia, Peilin Song, Hao Zheng: Characterizing the VCO jitter due to the digital simultaneous switching noise. ACM Great Lakes Symposium on VLSI 2005: 70-73
12EETian Xia, Hao Zheng, Jing Li, Ahmed Ginawi: Self-Refereed On-Chip Jitter Measurement Circuit Using Vernier Oscillators. ISVLSI 2005: 218-223
2004
11EETiehua Du, Kah Bin Lim, Geok Soon Hong, Wei Miao Yu, Hao Zheng: 2-D Occluded Object Recognition Using Wavelets. CIT 2004: 227-232
10EEBilly Lim, Hao Zheng: A day in the life of Jini: a peek at service-oriented architecture for internet appliances. IJMC 2(2): 199-216 (2004)
2003
9EEMichael Epstein, Laszlo Hars, Raymond Krasinski, Martin Rosner, Hao Zheng: Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts. CHES 2003: 152-165
8EEHao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda: Verification of Timed Circuits with Failure Directed Abstractions. ICCD 2003: 28-35
7EEHao Zheng, Eric Mercer, Chris J. Myers: Modular verification of timed circuits using automatic abstraction. IEEE Trans. on CAD of Integrated Circuits and Systems 22(9): 1138-1153 (2003)
2001
6EEChris J. Myers, Wendy Belluomini, Kip Kallpack, Eric Peskin, Hao Zheng: Timed circuits: a new paradigm for high-speed design. ASP-DAC 2001: 335-340
5EEHao Zheng, Eric Mercer, Chris J. Myers: Automatic Abstraction for Verification of Timed Circuits and Systems. CAV 2001: 182-193
1999
4EEBrandon M. Bachman, Hao Zheng, Chris J. Myers: Architectural Synthesis of Timed Asynchronous Systems. ICCD 1999: 354-363
3 Jianer Chen, Donald K. Friesen, Hao Zheng: Tight Bound on Johnson's Algorithm for Maximum Satisfiability. J. Comput. Syst. Sci. 58(3): 622-640 (1999)
1997
2EEJianer Chen, Donald K. Friesen, Hao Zheng: Tight Bound on Johnson's Algoritihm for Max-SAT. IEEE Conference on Computational Complexity 1997: 274-281
1995
1EEHao Zheng, Kewal K. Saluja, Rajiv Jain: Test application time reduction for scan based sequential circuits. Great Lakes Symposium on VLSI 1995: 188-191

Coauthor Index

1Brandon M. Bachman [4]
2Wendy Belluomini [6]
3Jianer Chen [2] [3]
4Yifan Chen [16]
5Tiehua Du [11]
6Michael Epstein [9]
7Donald K. Friesen [2] [3]
8Ahmed Ginawi [12]
9Laszlo Hars [9]
10Geok Soon Hong [11]
11Rajiv Jain [1]
12Kip Kallpack [6]
13Raymond Krasinski [9]
14Jing Li [12]
15Billy Lim [10]
16Kah Bin Lim [11]
17Scott Little [8] [14]
18Eric Mercer (Eric G. Mercer) [5] [7]
19Di Mu [15]
20Chris J. Myers [4] [5] [6] [7] [8] [14]
21Eric Peskin [6]
22Martin Rosner [9]
23Kewal K. Saluja [1]
24Peilin Song [13]
25David Walter [8] [14]
26Xian Wu [17]
27Tian Xia [12] [13] [15]
28Miao Xiong [16]
29Tomohiro Yoneda [8] [14]
30Wei Miao Yu [11]
31Yong Yu [16] [17]

Colors in the list of coauthors

Copyright © Fri Sep 5 16:23:00 2008 by Michael Ley (ley@uni-trier.de)