IBM Journal of Research and Development, Volume 49, 2005

Volume 49, Number 1, 2005

• Editor's Note. 1-2
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• Phillipe M. Vereecken, Robert A. Binstead, Hariklia Deligianni, Panayotis C. Andricacos:
  The chemistry of additives in damascene copper plating. 3-18
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• Thomas P. Moffat, Daniel Wheeler, Monica D. Edelstein, Daniel Josell:
  Superconformal film growth: Mechanism and quantification. 19-36
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• Alan C. West, Hariklia Deligianni, Panayotis C. Andricacos:
  Electrochemical planarization of interconnect metallization. 37-48
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• Timothy O. Drews, Sriram Krishnan, Jay Alameda, Dennis Gannon, Richard D. Braatz, Richard C. Alkire:
  Multiscale simulations of copper electrodeposition onto a resistive substrate. 49-64
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• Thomas L. Ritzdorf, Gregory J. Wilson, Paul R. McHugh, Daniel J. Woodruff, Kyle M. Hanson, Dakin Fulton:
  Design and modeling of equipment used in electrochemical processes for microelectronics. 65-78
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• Li Sun, Yaowu Hao, Chia-Ling Chien, Peter C. Searson:
  Tuning the properties of magnetic nanowires. 79-102
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• Emanuel I. Cooper, Christian Bonhôte, Jürgen Heidmann, Yimin Hsu, Philippe Kern, John W. Lam, Murali Ramasubramanian, Neil Robertson, Lubomyr T. Romankiw, Hong Xu:
  Recent developments in high-moment electroplated materials for recording heads. 103-126
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• Philip G. Emma, Allan Hartstein, Thomas R. Puzak, Viji Srinivasan:
  Exploring the limits of prefetching. 127-144
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• Richard E. Matick, Stanley Schuster:
  Logic-based eDRAM: Origins and rationale for use. 145-166
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• Taqi N. Buti, Robert G. McDonald, Zakaria Khwaja, Asit Ambekar, Hung Q. Le, William E. Burky, Bert Williams:
  Organization and implementation of the register-renaming mapper for out-of-order IBM POWER4 processors. 167-188
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Volume 49, Number 2-3, 2005

• Tilak Agerwala:
  Message from the Vice President, Systems, IBM Research Division. 190
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• George L.-T. Chiu, Manish Gupta, Ajay K. Royyuru:
  Preface. 191-194
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• Alan Gara, Matthias A. Blumrich, Dong Chen, George L.-T. Chiu, Paul Coteus, Mark Giampapa, Ruud A. Haring, Philip Heidelberger, Dirk Hoenicke, Gerard V. Kopcsay, Thomas A. Liebsch, Martin Ohmacht, Burkhard D. Steinmacher-Burow, Todd Takken, Pavlos Vranas:
  Overview of the Blue Gene/L system architecture. 195-212
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• Paul Coteus, H. Randall Bickford, Thomas M. Cipolla, Paul Crumley, Alan Gara, Shawn Hall, Gerard V. Kopcsay, Alphonso P. Lanzetta, Lawrence S. Mok, Rick A. Rand, Richard A. Swetz, Todd Takken, Paul La Rocca, Christopher Marroquin, Philip R. Germann, Mark J. Jeanson:
  Packaging the Blue Gene/L supercomputer. 213-248
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• Charles D. Wait:
  IBM PowerPC 440 FPU with complex-arithmetic extensions. 249-254
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• Martin Ohmacht, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Alan Gara, Mark Giampapa, Balaji Gopalsamy, Ruud A. Haring, Dirk Hoenicke, David J. Krolak, James A. Marcella, Ben J. Nathanson, Valentina Salapura, Michael E. Wazlowski:
  Blue Gene/L compute chip: Memory and Ethernet subsystem. 255-264
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• Narasimha R. Adiga, Matthias A. Blumrich, Dong Chen, Paul Coteus, Alan Gara, Mark Giampapa, Philip Heidelberger, Sarabjeet Singh, Burkhard D. Steinmacher-Burow, Todd Takken, Mickey Tsao, Pavlos Vranas:
  Blue Gene/L torus interconnection network. 265-276
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• Arthur A. Bright, Ruud A. Haring, Marc Boris Dombrowa, Martin Ohmacht, Dirk Hoenicke, Sarabjeet Singh, James A. Marcella, Robert F. Lembach, Steve M. Douskey, Matthew R. Ellavsky, Christian G. Zoellin, Alan Gara:
  Blue Gene/L compute chip: Synthesis, timing, and physical design. 277-288
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• Ruud A. Haring, Ralph Bellofatto, Arthur A. Bright, Paul Crumley, Marc Boris Dombrowa, Steve M. Douskey, Matthew R. Ellavsky, Balaji Gopalsamy, Dirk Hoenicke, Thomas A. Liebsch, James A. Marcella, Martin Ohmacht:
  Blue Gene/L compute chip: Control, test, and bring-up infrastructure. 289-302
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• Michael E. Wazlowski, Narasimha R. Adiga, Daniel K. Beece, Ralph Bellofatto, Matthias A. Blumrich, Dong Chen, Marc Boris Dombrowa, Alan Gara, Mark Giampapa, Ruud A. Haring, Philip Heidelberger, Dirk Hoenicke, Ben J. Nathanson, Martin Ohmacht, Robert Sharrar, Sarabjeet Singh, Burkhard D. Steinmacher-Burow, R. Brett Tremaine, Mickey Tsao, Arun R. Umamaheshwaran, Pavlos Vranas:
  Verification strategy for the Blue Gene/L chip. 303-318
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• Mark Giampapa, Ralph Bellofatto, Matthias A. Blumrich, Dong Chen, Marc Boris Dombrowa, Alan Gara, Ruud A. Haring, Philip Heidelberger, Dirk Hoenicke, Gerard V. Kopcsay, Ben J. Nathanson, Burkhard D. Steinmacher-Burow, Martin Ohmacht, Valentina Salapura, Pavlos Vranas:
  Blue Gene/L advanced diagnostics environment. 319-332
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• Subramanian S. Iyer, John E. Barth Jr., Paul C. Parries, James P. Norum, James P. Rice, Lyndon R. Logan, Dennis Hoyniak:
  Embedded DRAM: Technology platform for the Blue Gene/L chip. 333-350
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• Peter A. Boyle, Dong Chen, Norman H. Christ, Michael A. Clark, Saul D. Cohen, Calin Cristian, Zhihua Dong, Alan Gara, Balint Joo, Chulwoo Jung, Changhoan Kim, Ludmila A. Levkova, Xiaodong Liao, Robert D. Mawhinney, Shigemi Ohta, Konstantin Petrov, Tilo Wettig, Azusa Yamaguchi:
  Overview of the QCDSP and QCDOC computers. 351-366
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• José E. Moreira, George Almási, Charles Archer, Ralph Bellofatto, Peter Bergner, José R. Brunheroto, Michael Brutman, José G. Castaños, Paul Crumley, Manish Gupta, Todd Inglett, Derek Lieber, David Limpert, Patrick McCarthy, Mark Megerian, Mark P. Mendell, Michael Mundy, Don Reed, Ramendra K. Sahoo, Alda Sanomiya, Richard Shok, Brian E. Smith, Greg G. Stewart:
  Blue Gene/L programming and operating environment. 367-376
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• Siddhartha Chatterjee, Leonardo R. Bachega, Peter Bergner, Kenneth A. Dockser, John A. Gunnels, Manish Gupta, Fred G. Gustavson, Christopher A. Lapkowski, Gary K. Liu, Mark P. Mendell, Rohini D. Nair, Charles D. Wait, T. J. Christopher Ward, Peng Wu:
  Design and exploitation of a high-performance SIMD floating-point unit for Blue Gene/L. 377-392
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• George Almási, Charles Archer, José G. Castaños, John A. Gunnels, C. Christopher Erway, Philip Heidelberger, Xavier Martorell, José E. Moreira, Kurt Pinnow, Joe Ratterman, Burkhard D. Steinmacher-Burow, William Gropp, Brian R. Toonen:
  Design and implementation of message-passing services for the Blue Gene/L supercomputer. 393-406
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• Xavier Martorell, Nils Smeds, Robert Walkup, José R. Brunheroto, George Almási, John A. Gunnels, Luiz De Rose, Jesús Labarta, Francesc Escalé, Judit Gimenez, Harald Servat, José E. Moreira:
  Blue Gene/L performance tools. 407-424
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• Yariv Aridor, Tamar Domany, Oleg Goldshmidt, José E. Moreira, Edi Shmueli:
  Resource allocation and utilization in the Blue Gene/L supercomputer. 425-436
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• Juergen Lorenz, Stefan Kral, Franz Franchetti, Christoph W. Ueberhuber:
  Vectorization techniques for the Blue Gene/L double FPU. 437-446
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• Robert S. Germain, Yuriy Zhestkov, Maria Eleftheriou, Aleksandr Rayshubskiy, Frank Suits, T. J. Christopher Ward, Blake G. Fitch:
  Early performance data on the Blue Matter molecular simulation framework. 447-456
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• Maria Eleftheriou, Blake G. Fitch, Aleksandr Rayshubskiy, T. J. Christopher Ward, Robert S. Germain:
  Scalable framework for 3D FFTs on the Blue Gene/L supercomputer: Implementation and early performance measurements. 457-464
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• Robert F. Enenkel, Blake G. Fitch, Robert S. Germain, Fred G. Gustavson, A. Martin, Mark P. Mendell, Jed W. Pitera, Michael Pitman, Aleksandr Rayshubskiy, Frank Suits, William C. Swope, T. J. Christopher Ward:
  Custom math functions for molecular dynamics. 465-474
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• Frank Suits, Michael Pitman, Jed W. Pitera, William C. Swope, Robert S. Germain:
  Overview of molecular dynamics techniques and early scientific results from the Blue Gene project. 475-488
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• Gyan Bhanot, Alan Gara, Philip Heidelberger, Eoin Lawless, James C. Sexton, Robert Walkup:
  Optimizing task layout on the Blue Gene/L supercomputer. 489-500
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Volume 49, Number 4-5, 2005

• Joel M. Tendler:
  Preface. 503-
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• Balaram Sinharoy, Ronald N. Kalla, Joel M. Tendler, Richard J. Eickemeyer, Jody B. Joyner:
  POWER5 system microarchitecture. 505-522
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• William J. Armstrong, Richard L. Arndt, David C. Boutcher, Robert G. Kovacs, David Larson, Kyle A. Lucke, Naresh Nayar, Randal C. Swanberg:
  Advanced virtualization capabilities of POWER5 systems. 523-532
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• Paul Mackerras, Thomas S. Mathews, Randal C. Swanberg:
  Operating system exploitation of the POWER5 system. 533-540
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• Dave W. Victor, John M. Ludden, Richard D. Peterson, Bradley S. Nelson, W. Keith Sharp, James K. Hsu, Bing-Lun Chu, Michael L. Behm, Rebecca M. Gott, Audre D. Romonosky, Steven R. Farago:
  Functional verification of the POWER5 microprocessor and POWER5 multiprocessor systems. 541-554
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• Harry M. Mathis, Alex E. Mericas, John D. McCalpin, Richard J. Eickemeyer, Steven R. Kunkel:
  Characterization of simultaneous multithreading (SMT) efficiency in POWER5. 555-564
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• Rebecca M. Gott, Jason Baumgartner, Paul Roessler, S. I. Joe:
  Functional formal verification on designs of pSeries microprocessors and communication subsystems. 565-580
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• Steven P. Goldman, Lisa M. Mohr, David R. Smith:
  Using microcode in the functional verification of an I/O chip. 581-588
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• James A. Kahle, Michael N. Day, H. Peter Hofstee, Charles R. Johns, Theodore R. Maeurer, David J. Shippy:
  Introduction to the Cell multiprocessor. 589-604
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• Katharine G. Frase, David E. Seeger:
  Preface. 605-
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• Sung K. Kang, Paul Lauro, Da-Yuan Shih, Donald W. Henderson, Karl J. Puttlitz:
  Microstructure and mechanical properties of lead-free solders and solder joints used in microelectronic applications. 607-620
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• Peter A. Gruber, Luc Bélanger, Guy P. Brouillette, David H. Danovitch, Jean-Luc Landreville, David T. Naugle, Valerie A. Oberson, Da-Yuan Shih, Chris L. Tessler, Michel R. Turgeon:
  Low-cost wafer bumping. 621-640
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• Edmund D. Blackshear, Moises Cases, Erich Klink, Stephen R. Engle, Ronald S. Malfatt, Daniel N. deAraujo, Stefano Oggioni, Luke D. Lacroix, Jamil A. Wakil, Nam H. Pham, Gareth G. Hougham, David J. Russell:
  The evolution of build-up package technology and its design challenges. 641-662
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• Stephen L. Buchwalter, Peter J. Brofman, Claudius Feger, Michael A. Gaynes, Kang-Wook Lee, Luis J. Matienzo, David L. Questad:
  Effects of mechanical stress and moisture on packaging interfaces. 663-676
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• Edward J. Yarmchuk, Christopher W. Cline, Dominic C. Bruen:
  Latent defect screening for high-reliability glass-ceramic multichip module copper interconnects. 677-686
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• Dennis G. Manzer, John P. Karidis, Kathleen M. Wiley, Dominic C. Bruen, Christopher W. Cline, Charles Hendricks, Robert N. Wiggin, Yuet-Ying Yu:
  High-speed electrical testing of multichip ceramic modules. 687-698
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• Claudius Feger, Jeffrey D. Gelorme, Maurice McGlashan-Powell, Dilhan M. Kalyon:
  Mixing, rheology, and stability of highly filled thermal pastes. 699-708
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• Roger R. Schmidt, E. E. Cruz, Madhusudan K. Iyengar:
  Challenges of data center thermal management. 709-724
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• John U. Knickerbocker, Paul S. Andry, L. Paivikki Buchwalter, Alina Deutsch, Raymond R. Horton, Keith A. Jenkins, Young Hoon Kwark, Gerald McVicker, Chirag S. Patel, Robert J. Polastre, Christian D. Schuster, Arun Sharma, Sri M. Sri-Jayantha, Christopher W. Surovic, Cornelia K. Tsang, Buck C. Webb, Steven L. Wright, Samuel R. McKnight, Edmund J. Sprogis, Bing Dang:
  Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection. 725-754
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• Alan F. Benner, Michael Ignatowski, Jeffrey A. Kash, Daniel M. Kuchta, Mark B. Ritter:
  Exploitation of optical interconnects in future server architectures. 755-776
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• Mary Yvonne Lanzerotti, Giovanni Fiorenza, Rick A. Rand:
  Microminiature packaging and integrated circuitry: The work of E. F. Rent, with an application to on-chip interconnection requirements. 777-803
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Volume 49, Number 6, 2005

• Douglas Balog:
  Message from the Vice President, BladeCenter Development, IBM Systems and Technology Group. 806-
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• Thomas M. Bradicich:
  Preface. 807-
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• Dhruv M. Desai, Thomas M. Bradicich, David Champion, William Gavin Holland, Benjamin M. Kreuz:
  BladeCenter system overview. 809-822
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• James E. Hughes, Pravin S. Patel, Ivan R. Zapata, Thomas D. Pahel Jr., Jack P. Wong, Dhruv M. Desai, Bradley D. Herrman:
  BladeCenter midplane and media interface card. 823-836
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• James E. Hughes, Michael L. Scollard, Rudolf Land, James Parsonese, Christopher C. West, Victor A. Stankevich, Challis L. Purrington, Danny Q. Hoang, Gary R. Shippy, Mitchell L. Loeb, Mark W. Williams, Bruce A. Smith, Dhruv M. Desai:
  BladeCenter processor blades, I/O expansion adapters, and units. 837-860
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• Lynn S. Fore, David W. Cosby, Gregory Brian Pruett, David B. Rhoades, Charles O. Schulz, Bruce A. Smith, James L. Wooldridge:
  BladeCenter solutions. 861-872
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• Steven L. Vanderlinden, Bruce O. Anthony, Glenn D. Batalden, Bhaskar K. Gorti, John Lloyd, James Macon Jr., Gregory Brian Pruett, Bruce A. Smith:
  BladeCenter T system for the telecommunications industry. 873-886
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• Martin J. Crippen, Roland K. Alo, D. Champion, Raymond M. Clemo, Cynthia M. Grosser, N. J. Gruendler, Mohanlal S. Mansuria, Jason Aaron Matteson, Michael S. Miller, Brian A. Trumbo:
  BladeCenter packaging, power, and cooling. 887-904
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• Steven W. Hunter, Norm C. Strole, David W. Cosby, David M. Green:
  BladeCenter networking. 905-920
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• William Gavin Holland, Patrick L. Caporale, Don S. Keener, Andrew B. McNeill, T. B. Vojnovich:
  BladeCenter storage. 921-940
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• Thomas Brey, Brian E. Bigelow, Joseph E. Bolan, Harry Cheselka, Zeynep Dayar, Jeffery M. Franke, D. E. Johnson, Rajiv N. Kantesaria, Edward J. Klodnicki, Sumeet Kochar, Shane M. Lardinois, Carl A. Morrell, Michael S. Rollins, Robert R. Wolford, David R. Woodham:
  BladeCenter chassis management. 941-962
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• Gregory Brian Pruett, Anthony Abbondanzio, Julianne Bielski, Tushar D. Fadale, Aaron E. Merkin, Ziv Rafalovich, Linda A. Riedle, John W. Simpson:
  BladeCenter systems management software. 963-976
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• William Joseph Piazza, Richard E. Harper, Martin J. Crippen, Jason Aaron Matteson:
  BladeCenter thermal diagnostics. 977-988
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