11. IEEE Symposium on Computer Arithmetic 1993: Windsor, Canada
Earl E. Swartzlander Jr., Mary Jane Irwin, Graham A. Jullien (Eds.): 11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings. IEEE Computer Society/ 1993 ISBN 0-8186-3862-1- David M. Lewis: An accurate LNS arithmetic unit using interleaved memory function interpolator. 2-9
- Daniel W. Lozier: An underflow-induced graphics failure solved by SLI arithmetic. 10-17
- Peter R. Turner: Complex SLI arithmetic: Representation, algorithms and analysis. 18-25
- W. Kenneth Jenkins, Bernard A. Schnaufer, A. J. Mansen: Combined system-level redundancy and modular arithmetic for fault tolerant digital signal processing. 28-35
- S. S. Bizzan, Graham A. Jullien, Neil M. Wigley, William C. Miller: Integer mapping architectures for the polynomial ring engine. 44-51
- Stephen E. McQuillan, John V. McCanny, Robert Hamill: New algorithms and VLSI architectures for SRT division and square root. 80-86
- Eric M. Schwarz, Michael J. Flynn: Hardware starting approximation for the square root operation. 103-111
- Milos D. Ercegovac, Tomás Lang, Paolo Montuschi: Very high radix division with selection by rounding and prescaling. 112-119
- Nariankadu D. Hemkumar, Joseph R. Cavallaro: Efficient complex matrix transformations with CORDIC. 122-129
- Michael J. Schulte, Earl E. Swartzlander Jr.: Exact rounding of certain elementary functions. 138-145
- Jean-Claude Bajard, Sylvanus Kla, Jean-Michel Muller: BKM: A new hardware algorithm for complex elementary functions. 146-153
- J. D. Mellott, Jermy C. Smith, Fred J. Taylor: The Gauss machine: A Galois-enhanced quadratic residue number system systolic array. 156-162
- W. S. Briggs, David W. Matula: A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency. 163-170
- David Eisig, Josh Rotstain, Israel Koren: The design of a 64-bit integer multiplier/divider unit. 171-178
- Tudor Jebelean: Comparing several GCD algorithms. 180-185
- Xavier Merrheim, Jean-Michel Muller, Hong-Jin Yeh: Fast evaluation of polynomials and inverses of polynomials. 186-192
- Daniel Etiemble, Keivan Navi: Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. 194-201
- Marianne E. Louie, Milos D. Ercegovac: On digit-recurrence division implementations for field programmable gate arrays. 202-209
- Thomas K. Callaway, Earl E. Swartzlander Jr.: Estimating the power consumption of CMOS adders. 210-216
- S. E. Richardson: Exploiting trivial and redundant computation. 220-227
- Werner Krandick, Jeremy R. Johnson: Efficient multiprecision floating point multiplication with optimal directional rounding. 228-233
- Mohand Ourabah Benouamer, P. Jaillon, Dominique Michelucci, Jean-Michel Moreau: A lazy exact arithmetic. 242-249
- Dan Zuras: On squaring and multiplying large integers. 260-271
- N. Takagi: A modular multiplication algorithm with triangle additions. 272-276
- Peter Kornerup: High-radix modular multiplication for cryptosystems. 277-283
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-06-18T211851 by the dblp team