6. ASYNC 2000:
Eilat, Israel
6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2-6 April 2000, Eilat, Israel.
IEEE Computer Society 2000, ISBN 0-7695-0586-4
Theory & Verification Techniques
Asynchronous Design in Embedded Systems
Testability
Synthesis
- Ivan Blunno, Luciano Lavagno:
Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL.
84-92

- Hans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva:
High-Level Asynchronous System Design Using the ACK Framework.
93-103

- Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis.
104-113

- Michiel M. Ligthart, Karl Fant, Ross Smith, Alexander Taubin, Alex Kondratyev:
Asynchronous Design Using Commercial HDL Synthesis Tools.
114-

Arbitration & Circuit Techniques
Processor Design
- Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, S. Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli:
AMULET3i - An Asynchronous System-on-Chip.
162-175

- Mike J. G. Lewis, L. E. M. Brackenbury:
An Instruction Buffer for a Low-Power DSP.
176-

Pushing the Performance Limit
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