Atlanta, Georgia, USA International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), November 16-17, 2001, Atlanta, Georgia, USA. ACM, 2001
Caches and Memory Systems
Compilers and Optimization
Synthesis and Design Tools
- Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
A software development tool chain for a reconfigurable processor.
- Michael Ward, Neil C. Audsley:
Hardware compilation of sequential Ada.
- Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies:
Design space characterization for architecture/compiler co-exploration.
- Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm:
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture.
- Adam Johnson, Kenneth Mackenzie:
Pattern matching in reconfigurable logic for packet classification.
Power-and Energy-Aware Computing
Last update Sat May 18 00:46:07 2013
CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page
- Anil Seth, Ravindra B. Keskar, R. Venugopal:
Algorithms for energy optimization using processor instructions.
- Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob:
The performance and energy consumption of three embedded real-time operating systems.
- Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu:
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads.
- Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna:
EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems.
- Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement.
- Zhiyuan Li, Cheng Wang, Rong Xu:
Computation offloading to save energy on handheld devices: a partition scheme.