19. CAV 2007:
Berlin, Germany
Werner Damm, Holger Hermanns (Eds.):
Computer Aided Verification, 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007, Proceedings.
Lecture Notes in Computer Science 4590 Springer 2007, ISBN 978-3-540-73367-6 
Invited Talks
- Byron Cook:
Automatically Proving Program Termination.
1
- David M. Russinoff:
A Mathematical Approach to RTL Verification.
2
- Thomas Kropf:
Software Bugs Seen from an Industrial Perspective or Can Formal Methods Help on Automotive Software Development?
3
Invited Tutorials
Session I:
Compositionality
Session II:
Verification Process
Session III:
Timed Synthesis and Games
- Oded Maler, Dejan Nickovic, Amir Pnueli:
On Synthesizing Controllers from Bounded-Response Properties.
95-107
- Luca de Alfaro, Marco Faella:
An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games.
108-120
- Gerd Behrmann, Agnès Cougnard, Alexandre David, Emmanuel Fleury, Kim Guldstrand Larsen, Didier Lime:
UPPAAL-Tiga: Time for Playing Games!
121-125
- Martin Ouimet, Kristina Lundqvist:
The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems.
126-130
Session IV:
Infinitive State Verification
Session V:
Tool Environment
Session VI:
Shapes
- Josh Berdine, Cristiano Calcagno, Byron Cook, Dino Distefano, Peter W. O'Hearn, Thomas Wies, Hongseok Yang:
Shape Analysis for Composite Data Structures.
178-192
- Ranjit Jhala, Kenneth L. McMillan:
Array Abstractions from Proofs.
193-206
- Ahmed Bouajjani, Séverine Fratani, Shaz Qadeer:
Context-Bounded Analysis of Multithreaded Programs with Dynamic Linked Structures.
207-220
- Igor Bogudlov, Tal Lev-Ami, Thomas W. Reps, Mooly Sagiv:
Revamping TVLA: Making Parametric Shape Analysis Competitive.
221-225
Session VII:
Concurrent Program Verification
Session VIII:
Reactive Designs
Session IX:
Parallelisation
Session X:
Constraints and Decisions
Session XI:
Probabilistic Verification
Session XII:
Abstraction
Session XIII:
Assume-Guarantee Reasoning
Session XIV:
Hybrid Systems
Session XV:
Program Analysis
Session XVI:
SAT and Decision Procedures
- Vijay Ganesh, David L. Dill:
A Decision Procedure for Bit-Vectors and Arrays.
519-531
- Alessandro Cimatti, Marco Roveri, Viktor Schuppan, Stefano Tonetta:
Boolean Abstraction for Temporal Logic Satisfiability.
532-546
- Roberto Bruttomesso, Alessandro Cimatti, Anders Franzén, Alberto Griggio, Ziyad Hanna, Alexander Nadel, Amit Palti, Roberto Sebastiani:
A Lazy and Layered SMT($\mathcal{BV}$) Solver for Hard Industrial Verification Problems.
547-560
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