CDES 2007:
Las Vegas,
Nevada,
USA
Hamid R. Arabnia (Ed.):
Proceedings of the 2007 International Conference on Computer Design, CDES 2007, Las Vegas, Nevada, USA, June 25-28, 2007.
CSREA Press 2007, ISBN 1-60132-036-1 
Nanotechnology + Nanoscale Devices and Methodologies
Algorithms,
Circuit/Hardware Design,
and Tools
- Hussain Al-Asaad:
Efficient Global Fault Collapsing for Combinational Library Modules.
37-43
- Vipin Sharma, Waleed Al-Assadi, Ashwin Vasudevan:
A Built-in Current Monitor Design for Transient Current Testing.
44-46
- Huan-yu Tu, Fen-lin Wu:
Methods of Error Detection in Arithmetic Operations.
47-53
- Tian Xinhua, Zhang Minxuan:
A Unified Compressed Cache Hierarchy With Partial Cache Line Prefetching Used for SMT Processor.
54-60
- Kuo-pao Yang, Ghassan Alkadi:
A Modern Hardware Kit For Computer Science.
61-66
- Nagaraju Pothineni, Anshul Kumar, Kolin Paul:
Recurring Pattern Identification and its Application to Instruction Set Extension.
67-73
- Pradeep Nair, Eugene John:
Performance Analysis of an Intel Pentium-4 Based Personal Computer for Multiplke Sequence Alignment.
74-77
- François Giamarchi, Laurent Capocchi, Dominique Federici, Paul Bisgambiglia:
Test Pattern Generation Method for VHDL Descriptions with BFS-DEVS Simulator.
78-83
- Fatemeh Mohamadian, Reza Berangi, Mahmood Fathy:
A New Methodology for Hardware Design Based on UML for SystemC.
84-89
- Himanshu Thapliyal, Hamid R. Arabnia, Rajnish Bajpai, Kamal K. Sharma:
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic.
90-94
Power and Energy
High-Performance Systems and Design Issues + Tools/Os
Late Papers
Copyright © Sun Nov 15 04:12:27 2009
by Michael Ley (ley@uni-trier.de)
