CHDL 1993: Ottawa, Ontario, Canada

Session: BDD-based Design and Analysis Techniques

Session: HDL-based Design Methods

Session: Synthesis and Verification

Session: Protocol Specification

Session: Formal Reasoning about Regular Structures

Session: High Level Synthesis

Session: Design Capture (short papers)

Session: Timing Specifications in HDLs

Session: Textual and Graphical HDLs

Session: VHDL