DATE 2000: Paris, France

Embedded Software Generation

Low-Power Issues in System-Level Design

Circuit Analysis and Synthesis

Embedded Tutorial - Design Practices for Better Reliability and Yield

Embedded Tutorial - System Level Design Using C++

IP and Design Reuse

Layout

Heterogeneous Aspects in SOC Testing

System Specification

Implementation of Telecom Systems

Logic Synthesis: Combination

BIST for Mixed-Signal Applications

Decision Diagram Based Methods

Multi-Processor Architectures and Design Methods

Logic Synthesis: Performance Optimization

TPG and Diagnosis in BIST

Architectural-Level Synthesis

Analysis of Communication Circuits

Logic Synthesis: Covering and PTL Circuits

Delay and Functional Testing

Co-Synthesis of Embedded Systems

Hot Topic

Wire Performance

Analogue Aspects of System Testing

Abstraction Techniques

Panel Session - A Design Automation Roadmap for Europe

Interconnect Modelling and Analysis

Mixed A/D System Design

Scheduling and Timing Analysis for Real-Time Embedded Systems

Hot Topic

Dependability Issues in Advanced ICs and Systems

High-Level Power Optimization

Panel Session

Embedded Tutorial

Defect Oriented Test

Simulation and Emulation

Embedded System Design Frameworks

Power and Cost Issues in Testing

Poster Papers