1. DELTA 2002:
Christchurch,
New Zealand
1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand.
IEEE Computer Society 2002, ISBN 0-7695-1453-7 
@proceedings{DBLP:conf/delta/2002,
title = {1st IEEE International Workshop on Electronic Design, Test and
Applications (DELTA 2002), 29-31 January 2002, Christchurch,
New Zealand},
booktitle = {DELTA},
publisher = {IEEE Computer Society},
year = {2002},
isbn = {0-7695-1453-7},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Analog Test
Communications
Digital Signal Processing and Architectures
From Low to High Level Fault Simulation and Diagnosis
High Level Design
Memory
Power Issues in Design and Test
Sensor and Analog Design
- Meng-Lieh Sheu, Tai-Ping Sun, Far-Wen Jih:
Test Socket Chip for Measuring Dark Current in IR FPA.
167-171
- Chih-Wen Lu, Chung-Len Lee:
A Low Power High Speed Class-B Buffer Amplifier for Flat Panel Display Application.
172-176
- Wen-Yaw Chung, Mao-Hsiang Yeh, Jia-Chyi Chen, Shen-Kan Hsiung, Dorota G. Pijanowska, Wladyslaw Torbicz, Jung-Chuan Chou, Tai-Ping Sun:
Design of a Low-voltage Instrumentation Amplifier for Enzyme-Extended-Gate Field Effect Transistor Based Urea Sensor Application.
177-180
- Ranjit Singh, Low Lee Ngo, Ho Soon Seng, Frederick Neo Chwee Mok:
A Silicon Piezoresistive Pressure Sensor.
181-186
Special Session on Education
- César A. Piña:
Evolution Of The Mosis VLSI Educational Program.
187-191
- David V. Kerns, Sherra E. Kerns, Gill A. Pratt, Mark H. Somerville, Jill D. Crisman:
The Search for Design in Electrical Engineering Education.
192-196
- R. M. Hodgson:
The Development and Transfer of Advanced Technology from Universities to Industry.
197-202
- Ton J. Mouthaan, R. W. Brink, Henk Vos:
Competencies of BSc and MSc Programmes in Electrical Engineering and Student Portfolios.
203-208
- Dale A. Carnegie:
Electronics Education: A Systems Based Mechatronic Approach.
209-213
- Andrzej Rucinski, Barbara Dziurla-Rucinska:
Boundary Scan as a Test Solution in Microelectronics Curricula.
214-218
- Wayne Moorhead, Serge N. Demidenko:
Making ATE Accessible for Academic Institutions.
219-222
- Richard J. Blaikie, Maan M. Alkaisi, Steven M. Durbin, David R. S. Cumming:
Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach.
223-229
- Yves Bertrand, Marie-Lise Flottes, Florence Azaïs, Serge Bernard, Laurent Latorre, Regis Lorival:
European Network for Test Education.
230-234
- Yao Li, Paul Wilson:
PARTOS-11: an Efficient Real-Time Operating System for Low-Cost Microcontrollers.
235-239
- Murray Pearson, Dean Armstrong, Tony McGregor:
Design of a Processor to Support the Teaching of Computer Systems.
240-244
- John L. Bähr:
Applied Science (Electronics) at the University of Otago.
245-249
- R. Browne, Serge N. Demidenko, R. O'Driscoll:
Harnessing Geographically Distributed Cooperation in Microtechnology Course at Massey University.
250-256
Special Session on Electromagnetics and Control
Special Session on FPGA
- Parag K. Lala, K. K. Bondali:
On Biologically-Inspired Design of Fault-Tolerant Digital Systems.
287-290
- Anna Antola, Mariagiovanna Sami, Vincenzo Piuri:
On-line Diagnosis and Reconfiguration of FPGA Systems.
291-296
- Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian:
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA.
297-301
- Monica Alderighi, Fabio Casini, Sergio D'Angelo, Davide Salvi, Giacomo R. Sechi:
A Fault-Tolerant FPGA-based Multi-Stage Interconnection Network for Space Applications.
302-308
Special Session on Image Processing
- Jörg Velten, Anton Kummert:
FPGA-Based Implementation of Variable Sized Structuring Elements for 2D Binary Morphological Operations.
309-312
- Marco Krips, Thomas Lammert, Anton Kummert:
FPGA Implementation of a Neural Network for a Real-Time Hand Tracking System.
313-317
- Serge N. Demidenko, Rauf Kh. Sadykhov, Alexey N. Klimovich, Leonid P. Podenok, Maxim E. Vatkin:
Neural Networks to Solve the Problems of Control and Identification.
318-320
- Rui Xiao, Chip-Hong Chang, Thambipillai Srikanthan:
On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization.
321-325
- Saeid Sanei, Tracey Kah-Mein Lee:
An Architecture for High Speed Ultrasound Image Capture and Real-time 3D Reconstruction.
326-332
Special Session on Robotics
Special Session on Submicron Technology
Test Generation and Compaction
- Irith Pomeranz, Sudhakar M. Reddy:
Properties of Output Sequences and their Use in Guiding Property-Based Test Generation for Synchronous Sequential Circuits.
377-381
- Christophe Paoli, Marie-Laure Nivet, Jean François Santucci, Antoine Campana:
Path-Oriented Test Data Generation of Behavioral VHDL Description.
382-386
- Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada:
Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field.
387-391
- Kohei Miyase, Seiji Kajihara, Sudhakar M. Reddy:
A Method of Static Test Compaction Based on Don't Care Identification.
392-395
- Hideyuki Ichihara, Tomoo Inoue:
Generating Small Test Sets for Test Compression/Decompression Scheme Using Statistical Coding.
396-402
Test Techniques and Methodologies
- Ali Chehab, Rafic Z. Makki, Michael Spica, David Wu:
IDDT Test Methodologies for Very Deep Sub-micron CMOS Circuits.
403-407
- Gabriela Peretti, Eduardo Romero, Franco Salvático, Carlos A. Marqués:
A Functional Approach to Test Cascaded BCD Counters.
408-412
- Seiji Kajihara, Kenjiro Taniguchi, Irith Pomeranz, Sudhakar M. Reddy:
Test Data Compression Using Don't-Care Identification and Statistical Encoding.
413-416
- S. M. Aziz, S. J. Carr:
On C-Testability of Carry Free Dividers.
417-424
Poster Papers
- S. C. Mukhopadhyay:
Modeling of a Repulsive Type Magnetic Bearing for Five Axis Control Under Intermittent Operation Including Eddy Current Effect.
425-427
- C. Chakraborty, S. C. Mukhopadhyay:
A Novel Compound Type Resonant Rectifier Topology.
428-430
- Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu:
Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits.
431-433
- Jan Hlavicka, Petr Fiser:
Minimization and Partitioning Method Reducing Input Sets.
434-436
- Mirco Pieper, Anton Kummert:
Stand-alone Digital Real-Time Image Processing Board based on an FPGA.
437-439
- Zoorina Bee Kader Mastan, Azrul Ghazali, Muhammad Muhsin Idris:
Transmission of Data/Sketch through Telephone Lines using Gapping Technique via a Low Cost Telewriting Equipment .
440-442
- Matthew Worsman, Mike W. T. Wong, Y. S. Lee:
Enhancing The Static D. C. Fault Diagnosis Of A Resistance Temperature Detector Sensor Circuit Using Equivalent Fault Analysis.
443-446
- Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch:
Test Power: a Big Issue in Large SOC Designs.
447-449
- Sébastien Mallier, Fabienne Nouvel, Jean-Yves Baudais, Daniel Gardan, Ahmed Zeddam:
Multi-Carrier CDMA over Copper Lines-Comparison of Performances with the ADSL System.
450-452
- Leonardo L. Giovanini:
Multivariable Predictive Feedback Control.
453-458
- Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada:
Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits.
459-461
- Janusz Sosnowski, K. Szafran:
Monitoring Parallel Interfaces in System Environment.
462-465
- Shing Tenqchen, Ji-Horn Chang, Wu-Shiung Feng, Bor-Sheng Jeng:
Pipelining Extended Givens Rotation RLS Adaptive Filters.
466-473
- Yong Liu, Zhiqiang Gao, Xiangqing He:
A Flexible Embedded SRAM Compiler.
474-476
- Piia Simonen, Ilkka Saastamoinen, Mika Kuulusa, Jari Nurmi:
Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor.
477-479
- William Phipps, Ibrahim Al-Bahadly:
Sensorless Speed Control in Induction Motor Drives.
480-482
- Paul Gaynor, Jonathan Skipwith:
A High Voltage Amplifier for use in Medical Applications of Electroporation.
483-485
- Adrian A. Dorrington, Rainer Künnemeyer:
A Simple Microcontroller Based Digital Lock-in Amplifier for the Detection of Low Level Optical Signals.
486-488
- Ranjit Singh:
An Intelligent System for Odour Discrimination.
489-491
- Warwick Allen, Donald Bailey, Serge N. Demidenko, Vincenzo Piuri:
Test Chirp Signal Generation Using Spectral Warping.
492-495
- Vivek Gaur, Vishwani D. Agrawal, Michael L. Bushnell:
A New Transitive Closure Algorithm with Application to Redundancy Identification.
496-500
- Donald G. Bailey, D. Irecki, B. K. Lim, L. Yang:
Test Bed for Number Plate Recognition Applications.
501-503
- S. M. Aziz, C. N. Basheer, Joarder Kamruzzaman:
A Synthesisable VHDL Model for an Easily Testable Generalised Multiplier.
504-506
- Matthew Walker, Chris H. Messom:
A Comparison of Genetic Programming and Genetic Algorithms for Auto-tuning Mobile Robot Motion Control.
507-510
Copyright © Fri Nov 13 03:25:20 2009
by Michael Ley (ley@uni-trier.de)
