3. DELTA 2006:
Kuala Lumpur, Malaysia
Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2006), 17-19 January 2006, Kuala Lumpur, Malaysia.
IEEE Computer Society 2006, ISBN 0-7695-2500-8 
Cover
Introduction
- Message from the General Chairs.
- Message from the Program Chairs.
- Committees.
- Reviewers.
Session 1A:
Special Session on Diagnostic in Deep Submicron Technologies
Session 1B:
Analog Components and Design Techniques
Session 2A:
Image and Video Processing
Session 2B:
Special Session on Industrial and Practical Test Engineering
- Zhuoyu Bao, Suriya A. Kumar, David M. Wu, Vimal K. Natarajan, Mike Lin:
A Low Cost, High Quality Embedded Array DFT Technique for High Performance Processors.
57-63
- Chuah Joon Huang Huang, Joel Knight:
VertiCal, a Universal Calibration System for eSys High Performance 32-Bit PowerPC Microcontrollers; Test Challenges & Solution.
64-67
- Shao Chee Ong:
Enabling Test-Time Optimized Pseudorandom Bit Stream (PRBS) 2^31 BER Testing on Automated Test Equipment for 10Gbps Device.
68-73
- Lew Boon Kian:
Test Cost Saving and Challenges in the Implementation of x6 and x8 Parallel Testing on Freescale 16-bit HCS12 Micro-controller Product Family.
74-82
Poster Session 1
- Kan-Lin Hsiung:
Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-Based Approach.
83-84
- Johnny Koh, Tiong Sieh Kiong, I. B. Aris, Senan Mahmoud:
Dual-Head Marking Performance Optimisation via Evolutionary Solutions.
85-88
- Peter J. Green, Desmond P. Taylor:
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmable Gate Array.
89-92
- Kevin Tom, Atila Alvandpour:
Curvature Compensated CMOS Bandgap with Sub 1V Supply.
93-96
- Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang:
Energy Efficient Cache Tuning with Performance Bound.
97-100
- Moi-Tin Chew, Gourab Sen Gupta, Subhas Mukhopadhyay, Tracey Kah-Mein Lee:
Developing an Effective Microcontroller Course Based on Field-Programmable Mixed-Signal µ-Controller Product.
101-104
- Syed Zahidul Islam, Mohd. Alauddin Mohd. Ali:
Test Pattern Optimization using Proper Seed Selection in Mixed-Mode Technique.
105-112
Session 3A:
Special Session on Electronics Education
Session 3B:
Synthesis and Logic Optimization
Session 4A:
Special Session on Electromagnetic Sensors & Devices 1
Session 4B:
Fault Modelling
Poster Session 2
- Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura:
Current Testable Design of Resistor String DACs.
197-200
- Min-An Song, Ting-Chun Huang, Sy-Yen Kuo:
A Functional Verification Environment for Advanced Switching Architecture.
201-204
- Vineetha Kalavally, Tin Win, Malin Premaratne:
Crosstalk in Counter-Pumped Distributed Raman Amplifiers with DTDM pumping.
205-209
- Haijun Mo, Ping Huang, Shaowei Wu:
Study on Dynamic Stability of a Tracked Robot Climbing over an Obstacle or Descending Stairs.
210-213
- Francisco Poza, Perfecto Mariño, Santiago Otero, Fernando Machado:
Virtual Instrument for Condition Monitoring of On-Load Tap Change.
214-218
- Madhu Bhaskaran, Sharath Sriram, Aleksandar Stojcevski, Aladin Zayegh:
Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply.
219-222
- Bassel Soudan:
Reducing Inductive Coupling Skew in Wide Global Signal Busses.
223-226
- Bruno Girodias, El Mostapha Aboulhamid, Gabriela Nicolescu:
A Platform for Refinement of OS Services for Embedded Systems.
227-236
Session 5A:
Processor Design and Analysis
Session 5B:
Novel Systems and Applications
- Andrew D. Payne, Dale A. Carnegie, Adrian A. Dorrington, Michael J. Cree:
Full Field Image Ranger Hardware.
263-268
- Maarten Uijt de Haag, Ananth Vadlamani, Jacob L. Campbell, Jeff Dickman:
Application of Laser Range Scanner Based Terrain Referenced Navigation Systems for Aircraft Guidance.
269-274
- Alex See Kok Bin, Shen Weixiang, Ong Kok Seng, Saravanan Ramanathan, Low I-Wern:
Development of a LabVIEW-based test facility for standalone PV systems.
275-280
- Tan Soon-Hwei, Loh Poh-Yee, Mohd-Shahiman Sulaiman:
A Low-Power High-Speed 1-Mb CMOS SRAM.
281-288
Session 6A:
Innovations in Test
Session 6B:
Special Session on Microphotonics
Poster Session 3
- Janusz Sosnowski, Marek Poleszak:
On-line Monitoring of Computer systems.
327-331
- Shahram Minaei, Erkan Yüce, Oguzhan Cicekoglu:
Lossless Active Floating Inductance Simulator.
332-335
- K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srinivas:
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method.
336-339
- Jiri Haze, Radimir Vrba:
The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique.
340-344
- Huaikou Miao, Zhicheng Wen:
An Approach to Extending Object-Z with Real-Time.
345-349
- Rong Zheng, Zhenglin Wang, Kamal E. Alameh:
An Opto-VLSI Based Tunable Fiber Ring Laser.
350-353
- B. Sokol, S. V. Yarmolik:
Address Sequences for March Tests to Detect Pattern Sensitive Faults.
354-360
Session 7A:
Special Session on Electromagnetic Sensors & Devices 2
Session 7B:
BIST and Memory Test
Poster Session 4
- Ashok Sivaji:
Measurements System Analysis.
393-396
- Haihua Liu, Changsheng Xie, Zhouhui Chen, Yi Lei:
Segmentation of Ultrasound Image Based on Morphological Operation and Fuzzy Clustering.
397-400
- Raymond Peterkin, Dan Ionescu:
A Hardware Implementation of Layer 2 MPLS.
401-404
- Donald G. Bailey, K. T. Gribbon, Christopher T. Johnston, Montree Siripruchyanun:
GATOS: A Windowing Operating System for FPGAs.
405-409
- Montree Siripruchyanun:
A Low-Voltage, Low-Power Current-mode Automatic Gain Control (AGC) for Battery-Powered Equipment.
410-413
- Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Reddy Kotha, Kunul Gottimukkula, M. B. Srinivas:
Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder.
414-417
- M. Puczko, V. N. Yarmolik:
Designing cryptographic key generators with low power consumption.
418-421
- P. W. Chandana Prasad, Bruce Mills, Ali Assi, S. M. N. Arosha Senanayake, V. C. Prasad:
Evaluation time Estimation for Pass Transistor Logic circuits.
422-428
Session 8A:
Special Session on Defect and Fault Tolerance in Electronic Systems
Session 8B:
Signal Processing
Session 9A:
Design Verification and Concurrent Checking
Session 9B:
Communications and Networking
Last update Wed May 22 02:57:34 2013
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