2. EDCC 1996: Taormina, Italy

Session 1: Distributed Fault Tolerance

• Jean-Charles Fabre, Tanguy Pérennou:
  Friends - A Flexible Architecture for Implementing Fault Tolerant and Secure Distributed Applications. 3-20
  
• Jürgen Bohne, Reny Grönberg:
  Adaptable Fault Tolerance for Distributed Process Control Using Exclusively Standard Components. 21-34
  

Session 2: Fault Injection

• David Powell, Michel Cukier, Jean Arlat:
  On Stratified Sampling for High Coverage Estimations. 37-54
  
• Pedro Furtado, Henrique Madeira:
  Fault Injection Evaluation of Assigned Signatures in a RISC Processor. 55-72
  
• Emmerich Fuchs:
  An Evaluation of the Error Detection Mechanisms in MARS Using Software-Implemented Fault Injection. 73-90
  

Session 3: Modeling and Evaluation

• Manuela Nelli, Andrea Bondavalli, Luca Simoncini:
  Dependability Modeling and Analysis of Complex Control Systems: An Application to Railway Interlocking. 93-110
  
• Peter T. Popov:
  The Effect of Interfailure Time Variability on the Software Reliability Growth Modelling. 111-128
  
• Silke Draber, Bernhard Eschermann:
  Dependability Evaluation of a Computing System for Traction Control of Electrical Locomotives. 129-140
  
• Vicente Santonja, Marina Alonso, Xavier Molero, Juan José Serrano, Pedro J. Gil, Rafael Ors:
  Dependability Models of RAID Using Stochastic Activity Networks. 141-158
  

Session 4: Fault Tolerant Design

• Uwe Wildner:
  Compiler Assisted Self-checking of Structural Integrity Using Return Address Hashing. 161-177
  
• Dimiter R. Avresky, Chris M. Cunningham:
  Single Source Fault-Tolerant Broadcasting for Two-Dimensional Meshes Without Virtual Channels. 178-189
  
• Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore:
  On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. 190-202
  

Session 5: Basic Hardware Models

• Michel Renovell, P. Huc, Yves Bertrand:
  The Logic Threshold Based Voting: A Model for Local Feedback Bridging Fault. 205-213
  
• Dimitris Nikolos, Haridimos T. Vergos:
  On the Yield of VLSI Processors with on-chip CPU Cache. 214-230
  

Session 6: Testing

• Andrzej Krasniewski:
  Design of Dependable Hardware: What BIST is most Efficient? 233-245
  
• Janusz Sosnowski, A. Kusmierczyk:
  Pseudorandom Testing of Microprocessors an Instruction/Data Flow Level. 246-263
  
• Raimund Ubar, Marina Brik:
  Multi-Level Test Generation and Fault Diagnosis for Finite State Machines. 264-282
  

Session 7: Verification

• Agnès Arnould, Pascale Le Gall, Bruno Marre:
  Dynamic Testing from Bounded Data Type Specifications. 285-302
  
• Stéphane Barbey, Didier Buchs, Cécile Péraire:
  A Theory of Specification-Based Testing for Object-Oriented Software. 303-320
  
• Cinzia Bernardeschi, Alessandro Fantechi, Stefania Gnesi, Giorgio Mongardi:
  Proving Safety Properties for Embedded Control Systems. 321-332
  

Session 8: Replication and Distribution

• François J. N. Cosquer, Pedro Antunes, Paulo Veríssimo:
  Enhancing Dependability of Cooperative Applications in Partitionable Environments. 335-352
  
• Achour Mostéfaoui, Michel Raynal:
  Efficient Message Logging for Uncoordinated Checkpointing Protocols. 353-364
  
• Rachid Guerraoui, Rui Carlos Oliveira, André Schiper:
  Atomic Updates of Replicated Data. 365-382
  

Session 9: System Level Diagnosis

• André Postma, Gerie Hartman, Thijs Krol:
  Removal of all Faulty Nodes from a Fault-Tolerant Service by means of Distributed Diagnosis with Imperfect Fault Coverage. 385-402
  
• Jörn Altmann, András Pataricza, Tamás Bartha, Péter Urbán, A. Petri:
  Constraint Based System-Level Diagnosis of Multiprocessors. 403-420
  
• Guy G. Berthet, Henri J. Nussbaumer:
  A Unified Theory for f₁/f₂-Diagnosable Communication Networks. 421-438