3. EDCC 1999: Prague, Czech Republic

Jan Hlavicka, Erik Maehle, András Pataricza (Eds.): Dependable Computing - EDCC-3, Third European Dependable Computing Conference, Prague, Czech Republic, September 15-17, 1999, Proceedings. Lecture Notes in Computer Science 1667 Springer 1999, ISBN 3-540-66483-1

Dependability Modelling

Horst H. Henn:
Reliable and Secure Operation of Smart Cards. 3-6
Andrea Bondavalli, Ivan Mura, Kishor S. Trivedi:
Dependability Modelling and Sensitivity Analysis of Scheduled Maintenance Systems. 7-23
Klaus D. Heidtmann:
Evaluation of Video Communication over Packet Switching Networks. 24-41
Mourad Rabah, Karama Kanoun:
Dependability Evaluation of a Distributed Shared Memory Multiprocessor System. 42-62

Fevzi Belli:
Software Reliability Engineering - Risk Management for the New Millenium. 63-66

Assia Doudou, Benoît Garbinato, Rachid Guerraoui, André Schiper:
Muteness Failure Detectors: Specification and Implementation. 71-87
Henrik Lönn:
A Fault Tolerant Clock Synchronization Algorithm for Systems with Low-Precision Oscillators. 88-105
Klaus Echtle:
Avoiding Malicious Byzantine Faults by a New Signature Generation Technique. 106-123
Luís Moura Silva, João Gabriel Silva:
An Experimental Evaluation of Coordinated Checkpointing in a Parallel Machine. 124-142

Manuel Rodríguez, Frédéric Salles, Jean-Charles Fabre, Jean Arlat:
MAFALDA: Microkernel Assessment by Fault Injection and Design Aid. 143-160
Cristian Constantinescu:
Assessing Error Detection Coverage by Simulated Fault Injection. 161-170
Peter Folkesson, Johan Karlsson:
Considering Workload Input Variations in Error Coverage Estimation. 171-190

Daniel Gil, R. Martínez, J. V. Busquets, Juan Carlos Baraza, Pedro J. Gil:
Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System. 191-208
João Carlos Cunha, Mário Zenha Rela, João Gabriel Silva:
Can Software Implemented Fault-Injection Be Used on Real-Time Systems?. 209-228

Ralf Apfeld, M. Umbreit:
Integrated Safety in Flexible Manufacturing Systems. 229-238
Toshihito Shirai, Masayoshi Sakai, Koichi Futsuhara, Masao Mukaidono:
A Method for Implementing a Safety Control System Based on Its Separation into Safety-Related and Non-Safety-Related Parts. 239-250

Jerzy W. Greblicki, Stanislaw J. Piestrak:
Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits. 251-266
Maciej Bellos, Dimitris Nikolos, Haridimos T. Vergos:
Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks. 267-282
Stefano Chessa, B. Sallay, Piero Maestrini:
Diagnostic Model and Diagnosis Algorithm of a SIMD Computer. 283-302

Ondrej Novák:
Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata. 303-320
Tomasz Garbolino, Andrzej Hlawiczka:
A New LFSR with D and T Flip-Flops as an Effective Test Pattern Generator for VLSI Circuits. 321-338
Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich:
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. 339-350

Jörg Kaiser, Mohammad Ali Livani:
Achieving Fault-Tolerant Ordered Broadcasts in CAN. 351-363
Meng-Jang Lin, Keith Marzullo:
Directional Gossip: Gossip in a Wide Area Network. 364-379
Michael Mock, Edgar Nett, Stefan Schemmer:
Efficient Reliable Real-Time Group Communication for Wireless Local Area Networks. 380-400

Hélène Waeselynck, Pascale Thévenod-Fosse:
A Case Study in Statistical Testing of Reusable Concurrent Objects. 401-418
Paula Prata, João Gabriel Silva:
Fault-Detection by Result-Checking for the Eigenproblem. 419-436
Yung-Yuan Chen:
Concurrent Detection of Processor Control Errors by Hybrid Signature Monitoring. 437-454