1. FMCAD 1996:
Palo Alto, California, USA
: The Need for Formal Methods for Integrated Circuit Design.
: BMDs Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly Instructions.
: Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study.
: Inverting the Abstraction Mapping: A Methodology for Hardware Verification.
: PVS: Combining Specification, Proof Checking, and Model Checking.