4. FPGA 1996: Monterey, CA, USA

• Alireza Kaviani, Stephen Dean Brown:
  Hybrid FPGA Architecture. 3-9
  
• Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider, Lyle Albertson:
  Plasma: An FPGA for Million Gate Systems. 10-16
  
• Kengo Azegami, Shoichiro Kashiwakura, Koichi Yamashita:
  Flexible FPGA Architecture Realized of General Purpose SOG. 17-22
  
• Zeljko Zilic, Zvonko G. Vranesic:
  Using BDDs to Design ULMs for FPGAs. 24-30
  
• Shashidhar Thakur, D. F. Wong:
  Universal Logic Modules for Series-Parallel Functions. 31-37
  
• E. Schubert, Wolfgang Rosenstiel:
  Combined Spectral Techniques for Boolean Matching. 38-43
  
• Eduardo I. Boemo, Sergio López-Buedo, Juan M. Meneses:
  The Wave Pipeline Effect on LUT-Based FPGA Architectures. 45-50
  
• Vi Cuong Chan, David M. Lewis:
  Area-Speed Tradeoffs for Hierarchical Field-Programmable Gate Arrays. 51-57
  
• Peichen Pan, C. L. Liu:
  Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance. 58-64
  
• Joel Darnauer, Wayne Wei-Ming Dai:
  A Method for Generating Random Circuits and Its Application to Routability Measurement. 66-72
  
• André DeHon:
  Entropy, Counting, and Programmable Interconnect. 73-79
  
• Yao-Wen Chang, D. F. Wong, C. K. Wong:
  Universal Switch-Module Design for Symmetric-Array-Based FPGAs. 80-86
  
• Adrian Bratt, Ian Macbeth:
  Design and Implementation of a Field Programmable Analogue Array. 88-93
  
• Hans W. Klein:
  The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices. 94-98
  
• Fabrizio Lombardi, David Ashen, Xiao-Tao Chen, Wei-Kang Huang:
  Diagnosing Programmable Interconnect Systems for FPGAs. 100-106
  
• Charles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici:
  Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. 107-113
  
• André DeHon:
  DPGA Utilization and Application. 115-121
  
• Michael J. Wirthlin, Brad L. Hutchings:
  Sequencing Run-Time Reconfigured Hardware with Software. 122-128
  
• Chris Dick:
  Computing the Discrete Fourier Transform on FPGA Based Systolic Arrays. 129-135
  
• Jason Cong, John Peck, Yuzheng Ding:
  RASP: A General Logic Synthesis System for SRAM-Based FPGAs. 137-143
  
• Darren C. Cronquist, Larry McMurchie:
  Emerald: An Architecture-Driven Tool Compiler for FPGAs. 144-150
  
• Andreas Koch:
  Structured Design Implementation: A Strategy for Implementing Regular Datapaths on FPGAs. 151-157