24. FTCS 1994: Austin, Texas

Digest of Papers: FTCS/24, The Twenty-Fourth Annual International Symposium on Fault-Tolerant Computing, June 15-17, 1994, Austin, Texas. IEEE Computer Society, 1994, ISBN 0-8186-5520-8

Panel I

Timothy C. K. Chou, Jack Goldberg, David E. Morgan, Louis Scerbo: Challenges of Building a Dependable National Information Infrastructure (Panel). 2-3

Real-Time Systems

Tushar R. Sarnaik, Arun K. Somani: Effects of Resource Utilization Monitoring in Fault Recovery. 6-15
Daniel Mossé, Rami G. Melhem, Sunondo Ghosh: Analysis of a Fault-Tolerant Multiprocessor Scheduling Algorithm. 16-25
Chao-Ju Hou, Kang G. Shin: Replication and Allocation of Task Modules in Distributed Real-Time Systems. 26-35

Diagnosis

Amber Roy-Chowdhury, Prithviraj Banerjee: Algorithm-Based Fault Location and Recovery for Matrix Computations. 38-47
Laura Baldelli, Piero Maestrini: Diagnosos of Processor Arrays. 48-54
Hongying Wang, Douglas M. Blough, Leon Alkalaj: Analysis and Experimental Evaluation of Comparison-Based System-Level Diagnosis for Multiprocessor Systems. 55-64

Fault Simulation

Eric Jenn, Jean Arlat, Marcus Rimén, Joakim Ohlsson, Johan Karlsson: Fault Injection into VHDL Models: The MEFISTO Tool. 66-75
Marcus Rimén, Joakim Ohlsson, Jan Torin: On Microprocessor Error Behaviour Modeling. 76-85
Gregory L. Ries, Gwan S. Choi, Ravishankar K. Iyer: Device-Level Transient Fault Modeling. 86-94

Checking

David A. Rennels, Hyeongil Kim: Concurrent Error Detection in Self-Timed VLSI. 96-105
F. L. Vargas, Michael Nicolaidis: SEU-Tolerant SRAM Design Based on Current Monitoring. 106-115
Sudhakar M. Reddy, Irith Pomeranz, Rahul Jain: On Codeword Testing of Two-Rail and Parity TSC Checkers. 116-125

Industrial Experience Reports

Jiri Gaisler: Concurrent Error-Detection and Modular Fault-tolerance in a 32-bit Processing Core for Embedded Space Flight Applications. 128-130
Tetsuji Fukaya, Masayuki Hirayama, Yukihiro Mihara: Automatic Verifying Approach for Product Specification using FTA. 131-133
E. Amadio, P. Iaboni, M. La Manna, P. Mariano: Implementation of High Availability Mechanisms in the Air Traffic Control SIR-S System. 134-136
Alvin M. Blum, Ambuj Goyal, Philip Heidelberger, Stephen S. Lavenberg, Marvin K. Nakayama, Perwez Shahabuddin: Modeling and Analysis of System Dependability Using the System Availability Estimator. 137-141

Data Structures

Jonathan D. Bright, Gregory F. Sullivan: Checking Mergeable Priority Queues. 144-153
I-Ling Yen, Farokh B. Bastani: Systematic Incorporation of Efficient Fault Tolerance in Systems of Cooperating Parallel Programs. 154-163
Nancy M. Amato, Michael C. Loui: Checking Linked Data Structures. 164-173

Performance Trade-Off Strategies

Ann T. Tai: Performability-Driven Adaptive Fault Tolerance. 176-185
Dhiraj K. Pradhan, Nitin H. Vaidya: Roll-Forward and Rollback Recovery: Performance-Reliability Trade-Off. 186-195
Moncef Hamdaoui, Parameswaran Ramanathan: A Service Policy for Real-Time Customers with (m, k, )-Firm Deadlines. 196-205

Coding

Larry A. Dunning: A SEC-BED-DED Code with Byte Plus Bit Error Detection. 208-211
Luca G. Tallini, L. Merani, Bella Bose: Balanced Codes for Noise Reduction in VLSI Systems. 212-218
Uwe Sparmann, Sudhakar M. Reddy: On the Effectiveness of Residue Code Checking for Parallel Two's Complement Multipliers. 219-228

Panel II

Jack Goldberg, Hermann Kopetz, Binay Sugla, Chris J. Walter: Towards Effective Integration of Fault Tolerance and Real Time (Panel). 230

Panel III

Tilak Agerwala, W. Donald Frazer, Bernard Traversat, Dennis Young: Do Commercial MPPs Need Fault Tolerance? (Panel). 232

Fault-Tolerant Protocols and Programming

M. L. Liu, Divyakant Agrawal, Amr El Abbadi: The Performance of Two-phase Commit Protocols in the Presence of Site Failures. 234-243
Masato Suzuki, Takuya Katayama, Richard D. Schlichting: Implementing Fault Tolerance with an Attribute and Functional Based Model. 244-253

Verification

Pradip Bose: Architectural Timing Verification and Test for Super Scalar Processors. 256-265
James R. Bitner, Jawahar Jain, Magdy S. Abadir, Jacob A. Abraham, Donald S. Fussell: Efficient Algorithmic Circuit Verification Using Indexed BDDs. 266-275

Checkpointing

Chung-Ho Chen, Arun K. Somani: A Cache Protocol for Error Detection and Recovery in Fault-Tolerant Computing Systems. 278-287
James S. Plank, Kai Li: Faster Checkpointing with N+1 Parity. 288-297
E. N. Elnozahy, Willy Zwaenepoel: On the Use and Implementation of Message Logging. 298-307

Simulation, Measurement, and Coverage Evaluation

Nicholas S. Bowen, Amber Roy-Chowdhury: A Study of Throughput Degradation Following Single Node Failure in a Data Sharing System. 310-319
Inhwan Lee, Ravishankar K. Iyer, Abhay Metha: Identifying Software Problems Using Symptoms. 320-329
Wei Wang, Kishor S. Trivedi, Babubhai V. Shah, Joseph A. Profeta III: The Impact of Fault Expansion on the Interval Estimate for Fault Detection Coverage. 330-337

Fault Injection

Peter Lidén, Peter Dahlgren, Rolf Johansson, Johan Karlsson: On Latching Probability of Particle Induced Transients in Combinational Networks. 340-349
Henrique Madeira, João Gabriel Silva: Experimental Evaluation of the Fail-Silent Behaviour in Computers Without Error Masking. 350-359
Ching-Tai Chiu, Kishan Mehrotra, Chilukuri K. Mohan, Sanjay Ranka: Training Techniques to Obtain Fault-Tolerant Neural Networks. 360-369

Interconnection Networks

Hung-Kuei Ku, John P. Hayes: Connectivity and Fault Tolerance of Multiple-Bus Systems. 372-381
Ge-Ming Chiu, Shui-Pao Wu: Fault-Tolerant Routing Strategy in Hypercube Systems. 382-391
Bernard Mans, Nicola Santoro: Optimal Fault-Tolerant Leader Election in Chordal Rings. 392-401

System Design

Alain Azagury, Danny Dolev, Gera Goft, John M. Marberg, Julian Satran: Highly Available Cluster: A Case Study. 404-413
M. Abbott, David Har, Lorraine Herger, M. Kauffmann, Ken Mak, J. Murdock, Charles O. Schulz, T. Basil Smith, R. Brett Tremaine, D. Yeh, L. Wong: Durable Memory RS/6000 System Design. 414-423
David Cummings, Leon Alkalaj: Checkpoint/Rollback in a Distributed System Using Coarse-Grained Dataflow. 424-433

Testing/DFT

Ashutosh Mujumdar, Rajiv Jain, Kewal K. Saluja: Behavioral Synthesis of Testable Designs. 436-445
Xinghao Chen, Michael L. Bushnell: Dynamic State and Objective Learning for Sequential Circuit Automatic Test Generation Using Decomposition Equivalence. 446-455
Prasanti Uppaluri, Irith Pomeranz, Sudhakar M. Reddy: Test Pattern Generation for Path Delay Faults in Synchronous Sequential Circuits Using Multiple Fast Clocks and Multiple Observations Times. 456-465