5. ICES 2003: Trondheim, Norway
Andrew M. Tyrrell, Pauline C. Haddow, Jim Torresen (Eds.): Evolvable Systems: From Biology to Hardware, 5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings. Springer 2003 Lecture Notes in Computer Science ISBN 3-540-00730-X- Lyudmila Zinchenko, Heinz Mühlenbein, Victor Kureichik, Thilo Mahnig: A Comparison of Different Circuit Representations for Evolutionary Analog Circuit Design. 13-23
- Andrew J. Greensted, Andrew M. Tyrrell: Fault Tolerance via Endocrinologic Based Communication for Multiprocessor Systems. 24-34
- Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMara: A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs. 47-56
- Gunnar Tufte, Pauline C. Haddow: Building Knowledge into Developmental Rules for Circuit Design. 69-80
- Peter J. Bentley: Evolving Fractal Proteins. 81-92
- Keith L. Downing: Developmental Models for Emergent Computation. 105-116
- Piet van Remortel, Johan Ceuppens, Anne Defaweux, Tom Lenaerts, Bernard Manderick: Developmental Effects on Tuneable Fitness Landscapes. 117-128
- Andrew M. Tyrrell, Eduardo Sanchez, Dario Floreano, Gianluca Tempesti, Daniel Mange, Juan Manuel Moreno, Jay R. Rosenberg, Alessandro E. P. Villa: POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware. 129-140
- Gianluca Tempesti, Daniel Roggen, Eduardo Sanchez, Yann Thoma, Richard Canham, Andrew M. Tyrrell: Ontogenetic Development and Fault Tolerance in the POEtic Tissue. 141-152
- Daniel Roggen, Dario Floreano, Claudio Mattiussi: A Morphogenetic Evolutionary System: Phylogenesis of the POEtic Circuit. 153-164
- Jan Eriksson, Oriol Torres, Andrew Mitchell, Gayle Tucker, Ken Lindsay, David M. Halliday, Jay R. Rosenberg, Juan Manuel Moreno, Alessandro E. P. Villa: Spiking Neural Networks for Reconfigurable POEtic Tissue. 165-173
- Richard Canham, Andrew M. Tyrrell: A Learning, Multi-layered, Hardware Artificial Immune System Implemented upon an Embryonic Array. 174-185
- Lukás Sekanina: Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. 186-197
- Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim: Gene Finding Using Evolvable Reasoning Hardware. 198-207
- Arturo Hernández Aguirre, Edgar C. González Equihua, Carlos A. Coello Coello: Synthesis of Boolean Functions Using Information Theory. 218-227
- Jim Torresen: Evolving Multiplier Circuits by Training Set and Training Vector Partitioning. 228-237
- Cesar Ortega-Sanchez, Jose Torres-Jimenez, Jorge Morales-Cruz: Routing of Embryonic Arrays Using Genetic Algorithms. 249-261
- Fulvio Corno, F. Cumani, Giovanni Squillero: Exploiting Auto-adaptive 7GP for Highly Effective Test Programs Generation. 262-273
- Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Meier, Johannes Schemmel, Felix Schürmann: Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms. 274-285
- Ricardo Salem Zebulum, Adrian Stoica, Didier Keymeulen, Michael I. Ferguson, Vu Duong, Xin Guo, Vatche Vorperian: Automatic Evolution of Signal Separators Using Reconfigurable Hardware. 286-295
- Henrik Hautop Lund, Rasmus Lock Larsen, Esben Hallundbæk Østergaard: Distributed Control in Self-reconfigurable Robots. 296-307
- Jesper Blynel: Evolving Reinforcement Learning-Like Abilities for Robots. 320-331
- Stephen L. Smith, David P. Crouch, Andrew M. Tyrrell: Evolving Image Processing Operations for an Evolvable Hardware Environment. 332-343
- M. A. Hannan Bin Azhar, Keith R. Dimond: Hardware Implementation of a Genetic Controller and Effects of Training on Evolution. 344-354
- Robert Goldsmith: Real World Hardware Evolution: A Mobile Platform for Sensor Evolution. 355-364
- Snorre Aunet, Morten Hartmann: Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware. 365-376
- N. Venkateswaran, C. Chandramouli: General Purpose Processor Architecture for Modeling Stochastic Biological Neuronal Assemblies. 387-397
- Carlos A. Coello Coello, Erika Hernández Luna, Arturo Hernández Aguirre: Use of Particle Swarm Optimization to Design Combinational Logic Circuits. 398-409
- Giovani Gomez Estrada: A Note on Designing Logical Circuits Using SAT. 410-421
- Werner Van Belle, Tom Mens, Theo D'Hondt: Using Genetic Programming to Generate Protocol Adaptors for Interprocess Communication. 422-433
- Sérgio G. Araújo, Antônio C. Mesquita, Aloysio Pedroza: Using Genetic Programming and High Level Synthesis to Design Optimized Datapath. 434-445
- Fumiaki Tanaka, Atsushi Kameda, Masahito Yamamoto, Azuma Ohuchi: The Effect of the Bulge Loop upon the Hybridization Process in DNA Computing. 446-456
- Hugo de Garis, Amit Gaur, Ravichandra Sriram: Quantum versus Evolutionary Systems. Total versus Sampled Search. 457-465
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-06-19T203413 by the dblp team