ICPP 1982:
Bellaire,
Michigan,
USA
International Conference on Parallel Processing, ICPP'82, August 24-27, 1982, Bellaire, Michigan, USA.
IEEE Computer Society 1982
- Laxmi N. Bhuyan, Dharma P. Agrawal:
Design and performance of a general class of interconnection networks.
2-9
- Daniel M. Dias, J. Robert Jump:
Augmented and pruned n log n multistaged networks: topology and performance.
10-12
- Jamshed H. Mirza:
Performance of self-routing shuffle-exchange interconnection network in SIMD processors.
13-15
- Wang Rong-Quan, Zhang Xiang, Gao Qing-Shi:
SP2I interconnection network and extension of the iteration method of automatic vector-routing.
16-25
- Chuan-lin Wu, Woei Lin, Min-Chang Lin:
Distributed circuit switching starnet.
26-33
- R. H. Barlow, D. J. Evans, J. Shanehci:
Comparative study of the exploitation of different levels of parallelism on different parallel architectures.
34-40
- Ph. Berger, P. Brouaye, J. C. Syre:
A mesh coloring method for efficient MIMD processing in finite element problems.
41-46
- J. S. Kowalik, S. P. Kumar:
An efficient parallel block conjugate method for linear equations.
47-52
- L. Adams, J. Ortega:
A multi-color SOR method for parallel computation.
53-56
- Thomas A. Rice, Leah J. Siegel:
A parallel algorithm for finding the roots of a polynomial.
57-61
- R. W. Hockney:
Optimizing the FACR Poisson-solver on parallel computers.
62-71
- Marián Vajtersic:
Parallel Poisson and biharmonic solvers implemented on the EGPA multiprocessor.
72-81
- Daniel D. Gajski, Ahmed H. Sameh, J. A. Wisniewski:
Iterative algorithms for tridiagonal matrices on a WSI-multiprocessor.
82-89
- T. P. Barnwell III, C. J. M. Hodges:
Optimal implementation of signal flow graphs on synchronous multiprocessors.
90-95
- Willie Y.-P. Lim:
A test strategy for packet switching networks.
96-98
- Tse-yun Feng, I-pieng Kao:
On fault-diagnosis of some multistage networks.
99-101
- John Paul Shen:
Fault tolerance analysis of several interconnection networks.
101-112
- L. Ciminiera, A. Serra:
A fault-tolerant connecting network for multiprocessing systems.
113-122
- J. Edward Lilienkamp, Duncan H. Lawrie, Pen-Chung Yew:
A fault tolerant interconnection network using error correcting codes.
123-125
- Eugene B. Hogenauer, A. Richard F. Newbold, Yul J. Inn:
DDSP - A data flow computer for signal processing.
126-133
- Gary N. Fostel:
Summary of a hybrid data flow system.
134-136
- Kenneth W. Todd:
Function sharing in a static data flow machine.
137-139
- F.-Y. Villemin:
SERFRE: A general-purpose multi-processor reduction machine.
140-141
- James C. Browne, Anand Tripathi, S. Fedak, Ashok K. Adiga, R. Kipur:
A language for specification and programming of reconfigurable parallel computation structures.
142-149
- Paul Caspi, Nicolas Halbwachs:
Algebra of events: a model for parallel and real time systems.
150-159
- Bharadwaj Jayaraman, Robert M. Keller:
Resource expressions for applicative languages.
160-167
- Richard Kennaway, M. Ronan Sleep:
Parallel implementation of functional languages.
168-170
- Eliezer Dekel, Sartaj Sahni:
Parallel generation of the postfix form.
171-177
- Eliezer Dekel, Sartaj Sahni:
A parallel matching algorithm for convex bipartite graphs.
178-184
- F. Gail Gray, William M. McCormack, Robert M. Haralick:
Significance of problem solving parameters on the performance of combinatorial algorithms on multi-computer parallel architectures.
185-192
- Bipin C. Desai, Clement Wing Hong Lam, J. William Atwood, Jaroslav Opatrny, Peter Grogono, S. Cabilio:
NOVAC: a non-tree variable tree for combinatorial computing.
193-195
- Clyde P. Kruskal:
Results in parallel searching, merging, and sorting.
196-198
- Albert G. Greenberg, Michael J. Fischer:
On computing weak transitive closure on O(log N) expected random parallel time.
199-204
- Ian A. Newman, M. C. Woodward:
Alternative approaches to multiprocessor garbage collection.
205-210
- H. C. Du:
Concurrent disk accessing for partial match retrieval.
211-218
- Clyde P. Kruskal:
Algorithms for replace-add based paracomputers.
219-223
- Jean-Pierre Banâtre, Michel Banâtre, Patrice Quinton:
Constructing parallel programs and their termination proof.
224-225
- Shun-Piao Su, Kai Hwang:
Multiple pipeline scheduling in vector supercomputers.
226-234
- Clifford N. Arnold:
Performance evaluation of three automatic vectorizer packages.
235-242
- Robert Hiromoto:
Results of parallel processing a large scientific problem on a commercially available multiple-processor computer system.
243-244
- Mark Furtney, Terrence W. Pratt:
Kernel-control tailoring of sequential programs for parallel execution.
245-247
- Gregory F. Grohoski, Janak H. Patel:
A performance model for instruction prefetch in pipelined instruction units.
248-252
- Christer Fernström:
Programming techniques on the LUCAS associative array computer.
253-261
- Kye S. Hedlund, Lawrence Snyder:
Wafer scale integration of Configurable, Highly Parallel (CHiP) processors.
262-264
- Janice E. Cuny, Lawrence Snyder:
Testing coordination for "homogeneous" parallel algorithms.
265-267
- John Burkley:
MPP VLSI multiprocessor integrated circuit design.
268-270
- Kuang-Hua Huang, Jacob A. Abraham:
Efficient parallel algorithms for processor arrays.
268-279
- M. Tadjan, R. E. Buehrer, W. Haelg:
Parallel simulation by means of a prescheduled MIMD-system featuring synchronous pipeline processors.
280-283
- Dennis Gannon:
Pipelining array computations for MIMD parallelism: a function specification.
284-286
- Harry F. Jordan:
Combining partial results in an MIMD computer.
287-289
- Michel Dubois, Faye A. Briggs:
An approximate analytical model for asynchronous processes in multiprocessors.
290-297
- Matthew O. Ward:
The automated design of task-specific parallel processing architectures.
298-300
- Henk J. Sips:
A bit-sequential multi-operand inner product processor.
301-303
- Bryan Gerard Mackay, Mary Jane Irwin:
A digit online arithmetic simulator.
304-306
- Edward C. Bronson, Leah J. Siegel:
A parallel architecture for acoustic processing in speech understanding.
307-312
- Yoshiyasu Takefuji, Koichiro Tsujino, Mari Ibuki, Hideo Aiso:
A novel approach to parallel processing cryptosystem.
313-315
- Bahaa W. Fam:
A parallel/pipeline processor for fast exponentiation.
316-318
- Victor P. Holmes, Bruce N. Malm, Tom H. Little:
Island universes: distributing a single-user operating system.
319-321
- M. Courvoisier:
A varied strategy programmable arbiter.
322-325
- Richard L. Norton, Jacob A. Abraham:
Using write back cache to improve performance of multi-user multiprocessors.
326-331
- W. C. Yen, K. S. Fu:
Coherence problem in a multi-cache system.
332-339
- Jack C. Wileden:
Constrained expression and the analysis of designs for dynamically-structured distributed systems.
340-344
- Lan Jin, Wei-min Zheng:
Analysis of a splitted-bus distributed multiprocessor system.
345-346
- Upen S. Chakravarthy, Simon Kasif, Madhur Kohli, Jack Minker, D. Cao:
Logic Programming on ZMOB: A Highly Parallel Machine.
347-349
- Vito A. Trujillo:
System Architecture of a Reconfigurable Multimicroprocessor Research System.
350-352
- James T. Kuehn, Howard Jay Siegel, Peter D. Hallenbeck:
Design and simulation of an MC68000-based multi-microprocessor system.
353-362
- David Lee Tuomenoksa, Howard Jay Siegel:
Analysis of the PASM control system memory hierarchy.
363-370
Copyright © Thu Dec 24 16:59:27 2009
by Michael Ley (ley@uni-trier.de)