ICS 2001: Sorrento, Napoli, Italy
G. Edward Suh, Srinivas Devadas, Larry Rudolph: Analytical cache models with applications to cache partitioning. 1-12
Jiajing Zhu, Jay Hoeflinger, David A. Padua: A synthesis of memory mechanisms for distributed architectures. 13-22
Dimitrios S. Nikolopoulos, Eduard Ayguadé, Theodore S. Papatheodorou, Constantine D. Polychronopoulos, Jesús Labarta: The trade-off between implicit and explicit data distribution in shared-memory programming paradigms. 23-37
Yonghong Song, Rong Xu, Cheng Wang, Zhiyuan Li: Data locality enhancement by memory reduction. 50-64
Steven J. Deitz, Bradford L. Chamberlain, Lawrence Snyder: Eliminating redundancies in sum-of-product array computations. 65-77
Peng Wu, Albert Cohen, Jay Hoeflinger, David A. Padua: Monotonic evolution: an alternative to induction variable substitution for dependence analysis. 78-91
Arun Chauhan, Ken Kennedy: Optimizing strategies for telescoping languages: procedure strength reduction and procedure vectorization. 92-101
Daniel Cociorva, J. W. Wilkins, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan: Loop optimization for a class of memory-constrained computations. 103-113
Daniel Jiménez-González, Juan J. Navarro, Josep-Lluis Larriba-Pey: Fast parallel in-memory 64-bit sorting. 114-122
Bradford L. Chamberlain, Lawrence Snyder: Array language support for parallel sparse computation. 133-145
Michel Cosnard, Laura Grigori: A parallel algorithm for sparse symbolic LU factorization without pivoting on out-of-core matrices. 146-153
John M. Mellor-Crummey, Robert J. Fowler, David B. Whalley: Tools for application-oriented performance tuning. 154-165
Dhruva R. Chakrabarti, Prithviraj Banerjee: Global optimization techniques for automatic parallelization of hybrid applications. 166-180
Jonghyun Lee, Marianne Winslett, Xiaosong Ma, Shengke Yu: Tuning high-performance scientific codes: the use of performance models to control resource usage during data migration and I/O. 181-195
Antoine Monsifrot, François Bodin: Computer aided hand tuning (CAHT): "applying case-based reasoning to performance tuning". 196-203
Carlos Álvarez, Jesús Corbal, Esther Salamí, Mateo Valero: On the potential of tolerant region reuse for multimedia applications. 218-228
Morgan Hirosuke Miki, Mamoru Sakamoto, Shingo Miyamoto, Yoshinori Takeuchi, Toyohiko Yoshida, Isao Shirakawa: Evaluation of processor code efficiency for embedded systems. 229-235
Claude Limousin, Julien Sébot, Alexis Vartanian, Nathalie Drach-Temam: Improving 3D geometry transformations on a simultaneous multithreaded SIMD processor. 236-245
H. Martin Bücker, Bruno Lang, Dieter an Mey, Christian H. Bischof: Bringing together automatic differentiation and OpenMP. 246-251
Paul van der Mark, Gerard Cats, Lex Wolters: Automatic code generation for a turbulence scheme. 252-259
Constantine Bekas, Effrosini Kokiopoulou, Ioannis Koutis, Efstratios Gallopoulos: Towards the effective parallel computation of matrix pseudospectra. 260-269
Dany Mezher: A graphical tool for driving the parallel computation of pseudosprectra. 270-276
Vivek Sarkar, Mauricio J. Serrano, Barbara B. Simons: Register-sensitive selection, duplication, and sequencing of instructions. 277-288
Julita Corbalán, Xavier Martorell, Jesús Labarta: Improving Gang Scheduling through job performance analysis and malleability. 303-311
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amirali Baniasadi: Slice-processors: an implementation of operation-based prediction. 321-334
Jin-Soo Kim, Kangho Kim, Sung-In Jung: Building a high-performance communication layer over virtual interface architecture on Linux clusters. 335-347
Matt Postiff, David A. Greene, Steven E. Raasch, Trevor N. Mudge: Integrating superscalar processor components to implement register caching. 348-357
Mark N. Yankelevsky, Constantine D. Polychronopoulos: alpha-coral: a multigrain, multithreaded processor architecture. 358-367
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar: Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor. 368-380
George S. Almasi, Calin Cascaval, José G. Castaños, Monty Denneau, Wilm E. Donath, Maria Eleftheriou, Mark Giampapa, C. T. Howard Ho, Derek Lieber, José E. Moreira, Dennis M. Newns, Marc Snir, Henry S. Warren Jr.: Demonstrating the scalability of a molecular dynamics application on a Petaflop computer. 393-406
Tzvetan Ostromsky, Wojciech Owczarz, Zahari Zlatev: Computational challenges in large-scale air pollution modelling. 407-418
Claudia Roberta Calidonna, Claudia Di Napoli, Maurizio Giordano, Mario Mango Furnari, Salvatore Di Gregorio: A network of cellular automata for a landslide simulation. 419-426
Ramesh Radhakrishnan, Ravi Bhargava, Lizy Kurian John: Improving Java performance using hardware translation. 427-439
Pramod G. Joisha, Samuel P. Midkiff, Mauricio J. Serrano, Manish Gupta: A framework for efficient reuse of binary code in Java. 440-453
Richard Tran Mills, Andreas Stathopoulos, Evgenia Smirni: Algorithmic modifications to the Jacobi-Davidson parallel eigensolver to dynamically balance external CPU and memory load. 454-463
Sergio Briguglio, Beniamino Di Martino, Gregorio Vlad: Workload decomposition for particle simulation applications on hierarchical distributed-shared memory parallel systems with integration of HPF and OpenMP. 464
Nancy Tran, Daniel A. Reed: ARIMA time series modeling and forecasting for adaptive I/O prefetching. 473-485
Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng: Evaluating the impact of memory system performance on software prefetching and locality optimizations. 486-500
Daniel Ortega, Mateo Valero, Eduard Ayguadé: A novel renaming mechanism that boosts software prefetching. 501-510



