Architectures and Compilation Techniques for Fine and Medium Grain Parallelism 1993: Orlando, Florida, USA
Michel Cosnard, Kemal Ebcioglu, Jean-Luc Gaudiot (Eds.): Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, Orlando, Florida, USA, 20-22 January, 1993. North-Holland 1993 IFIP Transactions ISBN 0-444-88464-5
Part 1: Compilation for Parallelism
- Jiang Wang, Christine Eisenbeis: Decomposed Software Pipelining: A New Approach to Exploit Instruction Level Parallelism for Loop Programs. 3-14
- A. Zaafrani, Mabo Robert Ito: Efficient Execution of Doacross Loops on Distributed Memory Systems. 27-38
- Chris J. Newburn, Andrew S. Huang, John Paul Shen: Balancing Fine- and Medium-Grained Parallelism in Scheduling Loops for the XIMD Architecture. 39-52
- Takayoshi Iitsuka: Flow-sensitive Interprocedural Analysis Method for Parallelization. 65-76
- Stephan Murer, Philipp Färber: Code Generation for Multi-Threaded Architectures from Dataflow Graphs. 77-90
- Walid A. Najjar, Lucas Roh, A. P. Wim Böhm: The Initial Performance of a Bottom-Up Clustering Algorithm for Dataflow Graphs. 91-100
Part 2: Architectures
- H. Seebauer, Jörg Siemers: Synchronization and Parallelism Control in the BARDE Dataflow Processor. 105-116
- Kentaro Shimada, Hanpei Koike, Hidehiko Tanaka: The Instruction Set Architecture of the Inference Processor UNIRED II. 117-128
- Jocelyn Sérot, Georges Quénot, Bertrand Zavidovique: A Functional Data-flow Architecture Dedicated to Real-time Image Processing. 129-140
- William G. Farquhar, Paraskevas Evripidou: DART: A Data-Driven Processor Architecture for Real-Time Computing. 141-152
- David E. Culler, Klaus E. Schauser, Thorsten von Eicken: Two Fundamental Limits on Dataflow Multiprocessing. 153-164
- Thomas L. Sterling, Michael J. MacDonald: The Realities of Parallel Processing and Dataflow's Role in It: Lessons from the NASA HPCC Program. 165-176
Part 3: Communication Issues
- Shahram Latifi: Parallel Dimension Permutations on Star-Graph. 191-201
- Rajendra V. Boppana: On the Effectiveness of Interleaved Memories for Binary Trees. 203-214
Part 4: Vliw Processors
- G. Menez, Michel Auguin, Fernand Boéri, C. Carrière: Contribution of Compilation Techniques to the Synthesis of Dedicated VLIW Architectures. 217-228
- Soo-Mook Moon, Kemal Ebcioglu, Ashok K. Agrawala: Selective Scheduling Framework for Speculative Operations in VLIW and Superscalar Processors. 229-242
- David A. Berson, Rajiv Gupta, Mary Lou Soffa: URSA: A Unified ReSource Allocator for Registers and Functional Units in VLIW Architectures. 243-254
Part 5: Experiences in Parallel Computing
- Norman Rubin: Data Flow Computing and the Conjugate Gradient Method. 257-264
- Marc Daumas, Paraskevas Evripidou: Results of Parallel Implementations of the Selection Problem Using Sisal. 265-272
- Andrew Sohn: A Parallel Implementation of the Traveling Salesman Problem on a Sequent Symmetry Mulitprocessor. 273-280
Part 6: Language Issues
- Andrew L. Wendelborn, H. Garsden: Exploring the Stream Data Type in SISAL and Other Languages. 283-294
- Edward A. Lee: Mulitdimensional Streams Rooted in Dataflow. 295-306
Part 7: Compiling Practice
- Ciaran O'Donnell: High Level Compiling for Low Level Machines. 309-320
- Ali-Reza Adl-Tabatabai, Thomas R. Gross, Guei-Yuan Lueh, James Reinders: Modeling Instruction-Level Parallelism for Software Pipelining. 321-330
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