IISWC 2008: Seattle, Washington, USA
David Christie, Alan Lee, Onur Mutlu, Benjamin G. Zorn (Eds.): 4th International Symposium on Workload Characterization (IISWC 2008), Seattle, Washington, USA, September 14-16, 2008. IEEE 2008 ISBN 978-1-4244-2778-9
Tim Sweeney: Wild speculation on consumer workloads in 2010-2020. 1
Amer Diwan: We have it easy, but do we have it right? 2
Jian Chen, Lizy Kurian John: Energy-aware application scheduling on a heterogeneous multi-core system. 5-13
Hao Feng, Eric Li, Yurong Chen, Yimin Zhang: Parallelization and characterization of SIFT on multi-core systems. 14-23
Padma Apparao, Ravi R. Iyer, Donald Newell: Implications of cache asymmetry on server consolidation performance. 24-32
Chi Cao Minh, JaeWoong Chung, Christos Kozyrakis, Kunle Olukotun: STAMP: Stanford Transactional Applications for Multi-Processing. 35-46
Christian Bienia, Sanjeev Kumar, Kai Li: PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors. 47-56
Gilberto Contreras, Margaret Martonosi: Characterizing and improving the performance of Intel Threading Building Blocks. 57-66
Michela Becchi, Mark A. Franklin, Patrick Crowley: A workload for evaluating deep packet inspection architectures. 79-89
Christopher Stewart, Matthew Leventi, Kai Shen: Empirical examination of a collaborative web application. 90-96
Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos: Temporal streams in commercial server applications. 99-108
Priya Nagpurkar, William Horn, U. Gopalakrishnan, Niteesh Dubey, Joefon Jann, Pratap Pattnaik: Workload characterization of selected JEE-based Web 2.0 applications. 109-118
Swaroop Kavalanekar, Bruce L. Worthington, Qi Zhang, Vishal Sharda: Characterization of storage workload traces from production Windows Servers. 119-128
Arkaitz Ruiz-Alvarez, Kim M. Hazelwood: Evaluating the impact of dynamic binary translation systems on hardware cache performance. 131-140
Ciji Isen, Lizy Kurian John, Jung Pil Choi, Hyo Jung Song: On the representativeness of embedded Java benchmarks. 153-162
Clay Hughes, Tao Li: Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis. 163-172
Cristiano Pereira, Harish Patil, Brad Calder: Reproducible simulation of multi-threaded workloads for architecture design exploration. 173-182



