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Proceedings of the 2nd Annual Symposium on Computer Architecture,
December 1974
- L. Nisnevich, E. Strasbourger:
Decentralized Priority Control in Data Communication.
1-6
- Cecil C. Reames, Ming T. Liu:
A Loop Network for Simultaneous Transmission of Variable-Length Messages.
7-11
- James F. Callan:
The Architecture of the Picture System.
13-16
- John Staudhammer, Jeffrey F. Eastman, James N. England:
A Fast Display-Oriented Processor.
17-22
- Jeffrey F. Eastman, John Staudhammer:
Computer Display of Colored Three-Dimensional Objects.
23-27
- Henry D. Kerr:
A Microprogrammed Processor For Interactive Computer Graphics.
28-33
- C. V. W. Armstrong:
Functional Memory Techniques Applied To The Microprogrammed Control Of An Associative Processor.
34-40
- James F. Wade, Paul D. Stigall:
Instruction Design To Minimize Program Size.
41-44
- James O. Bondi, Paul D. Stigall:
HMO, A Hardware Microcode Optimizer.
45-51
- A. M. Peskin:
The Computer Aided Design of Processor Architectures.
51a-55
- Wing H. Huen, Daniel P. Siewiorek:
Intermodule Protocol For Register Transfer Level Modules: Representation and Analytic Tools.
56-62
- Portia Isaacson:
Picture Systems, PS, and The Design of a Channel-To-Channel Computer Interface.
64-70
- Lennart Lofgren:
Reference Concepts in a Tree Structured Address Space.
71-79
- Judith A. Anderson, G. Jack Lipovski:
A Virtual Memory for Microprocessors.
80-84
- Robert E. Brundage, Alan P. Batson:
The Performance Enhancement of Descriptor-Based Virtual Memory Systems Through The Use of Associative Registers.
85-90
- Orin E. Marvel:
SPEAC-Special Purpose Electronic Area Correlator.
91-94
- James A. Satterfield:
Architecture Advances of the Space Shuttle Orbiter Avionics Computer System.
95-98
- Uno R. Kodres, William McCracken:
Design Study of an Avionics Navigation Microcomputer.
99-105
- Gerald R. Kane:
An Iteratively Structured Information Processor.
106-112
- Hamilton Richards Jr., A. E. Oldhoeft:
Hardware-Software Interactions in SYMBOS-2R's Operating System.
113-118
- Pierre Sylvain, Maniel Vineberg:
The Design and Evaluation of the Array Machine: A High-Level Language Processor.
119-125
- Jack B. Dennis, David Misunas:
A Preliminary Architecture for a Basic Data Flow Processor.
126-132
- Klaus J. Berkling:
Reduction Languages for Reduction Machines.
133-140
- Willis K. King, Fulvio Carbonaro:
Output Devices Sharing by Minicomputers.
141-145
- S. Rannem, V. Carl Hamacher, Safwat G. Zaky, P. Connolly:
On Relating Small Computer Performance to Design Parameters.
146-151
- Harold W. Lawson Jr.:
Advantages of Structured Hardware.
152-158
- Peter Kornerup:
Concepts of the MATHILDA System.
159-164
- Caxton C. Foster:
Socrates.
165-169
- Donald F. Wann, Robert A. Ellis:
Conjoined Computer Systems: An Architecture for Laboratory Data Processing and Instrument Control.
170-175
- E. Douglas Jensen:
A Distributed Function Computer for Real-Time Control.
176-182
- Charles H. Radoy, G. Jack Lipovski:
Switched Multiple Instruction, Multiple Data Stream Processing.
183-187
- Robert J. Lechner:
Sequentially Encoded Data Structures that Support Bidirectional Scanning.
188-194
- Martin Freeman:
An Instruction Class for an Extensible Interpreter.
195-200
- Wolfgang K. Giloi, Helmut K. Berg:
STARLET - A Computer Concept Based on Ordered Sets as Primitive Data Types.
201-206
- R. G. Cornell:
A Cellular General Purpose Computer.
207-213
- Barry C. Goldstein, Thomas W. Scrutchin:
A Machine-Oriented Resource Management Architecture.
214-219
- M. E. Sloan:
A Design-Oriented Computer Engineering Program.
220-224
- Janis B. Baron, Daniel E. Atkins:
An Educational Laboratory in Contemporary Digital Design.
225-231
Copyright © Fri Dec 18 18:37:31 2009
by Michael Ley (ley@uni-trier.de)