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Proceedings of the 6th Annual Symposium on Computer Architecture,
April 1979
- Edward P. Farrell, Noordin Ghani, Philip C. Treieaven:
A Concurrent Computer Architecture and a Ring Based Implementation.
1-11
- Robert Michael Owens, Mary Jane Irwin:
On-Line Algorithms for the Design of Pipeline Architectures.
12-19
- Virgil D. Gligor:
Architectural Implementations of Abstract Data Type Implementation.
20-30
- Ken Sakamura, Kiochi Nakano, Yoshio Kato, Hideo Aiso:
A New Approach to an Adaptive Computer - An Automatic Recovery Mechanism to Prevent the Occurance of Subtract Errors.
31-41
- Alexandre Brandwajn, Jean-Alain Hernandez, René Joly, Philippe Kruchten:
Overview of the ARCADE System.
42-49
- Roger B. Danneberg:
An Architecture with Many Operand Registers to Efficiently Execute Block-Structured Languages.
50-57
- Henry Fuchs, Brian W. Johnson:
An Expanded Multiprocessor Architecture for Video Graphics.
58-67
- C. V. W. Armstrong, N. A. Brans, H. M. Ahmed:
An Adaptive Multimicroprocessor Array Computing Structure for Radar Signal Processing Applications.
68-74
- Bryan D. Ackland:
A Bit-Slice Cache Controller.
75-82
- J. Archer Harris, David R. Smith:
Simulation Experiments on a Tree Organized Minicomputer.
83-89
- David A. Patterson, E. Scott Fehr, Carlo H. Séquin:
Design Considerations for the VLSI Processor of X-tree.
90-101
- Eiichi Goto, Tetsuo Ida, Kei Hiraki:
FLATS, a Machine for Numerical, Symbolic and Associative Computing.
102-110
- John D. Spragins, T. G. Lewis, Hossein Jafari:
Some Simplified Performance Modeling Techniques with Applications to a New Ring-Structured Microcomputer Network.
111-116
- Kishor S. Trivedi, Timothy M. Sigmon:
A Performance Comparison of Optimally Designed Computer Systems with and without Virtual Memory.
117-121
- Tilak Agerwala, K. Mani Chandy, D. E. Lang:
A Modeling Approach and Design Tool for Pipelined Central Processors.
122-129
- M. Sato, S. Nichikawa, K. Murakami, S. Takahira:
Dynamic Function Exchanging Mechanism in Poly-Processor System.
130-136
- B. R. Borgerson, M. D. Godfrey, P. E. Hagerty, T. R. Rykken:
The Architecture of Sperry Univac 1100 Series Systems.
137-146
- Hassan K. Reghbati:
An Efficient Time-Shared Link Processor for Supporting Communication in Parallel Systems with Dynamic Structure.
147-159
- Anand R. Tripathi, G. Jack Lipovski:
Packet Switching in Banyan Networks.
160-167
- Janak H. Patel:
Processor-Memory Interconnections for Multiprocessors.
168-177
- B. I. Strom:
Proof of the Equivalent Realizability of a Time-Bound Arbiter and a Runt-Free Inertail Delay.
178-181
- Mark A. Franklin, S. A. Kahn, M. J. Stucki:
Design Issues in the Development of a Modular Mutliprocessor Communications Network.
182-187
- Mamoru Maekawa:
Experimental Polyprocessor System (EPOS) - Architecture.
188-195
- Mamoru Maekawa:
Experimental Polyprocessor System (EPOS) - Operating System.
196-201
- Tse-Yun Feng, Chuan-lin Wu, Dharma P. Agrawal:
A Microprocessor-Controlled Asynchronous Circuit Switching Network.
202-215
- W. G. Rosocha, E. S. Lee:
Performance Enhancement of SISD Processors.
216-231
- S. Diane Smith, Howard Jay Siegel:
An Emulator Network for SIMD Machine Interconnection Networks.
232-241
Copyright © Sun Nov 15 04:50:32 2009
by Michael Ley (ley@uni-trier.de)