ISLPED 2009:
San Fancisco,
CA,
USA
Jörg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani (Eds.):
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009.
ACM 2009, ISBN 978-1-60558-684-7 
Keynote address 1
- Percy V. Gilbert:
Advances in process technology & IBM collaborative ecosystem for leadership power performance SOC designs.
1-2
Sub-threshold circuits
- David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat:
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic.
3-8
- Vita Pi-Ho Hu, Yu-Sheng Wu, Ming-Long Fan, Pin Su, Ching-Te Chuang:
Design and analysis of ultra-thin-body SOI based subthreshold SRAM.
9-14
- Jeremy R. Tolbert, Xin Zhao, Sung Kyu Lim, Saibal Mukhopadhyay:
Slew-aware clock tree design for reliable subthreshold circuits.
15-20
- David Bol, Denis Flandre, Jean-Didier Legat:
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits.
21-26
- Sudhanshu Khanna, Benton H. Calhoun:
Serial sub-threshold circuits for ultra-low-power systems.
27-32
Managing process variability
- Domenik Helms, Kai Hylla, Wolfgang Nebel:
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction.
33-38
- Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang:
Variation-aware supply voltage assignment for minimizing circuit degradation and leakage.
39-44
- Amlan Ghosh, Rahul M. Rao, Richard B. Brown:
A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation.
45-50
- Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye:
Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits.
51-56
- Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim:
Statistical static timing analysis considering leakage variability in power gated designs.
57-62
Energy-efficient analog subsystems
- Jiwei Fan, Xin Zhou, Liyu Yang, Alex Chien-Lin Huang:
A low power high noise immunity boost DC-DC converter using the differential difference amplifiers.
63-68
- Hui Shao, Chi-Ying Tsui, Wing-Hung Ki:
A single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applications.
69-74
- Hussain Alzaher, Noman Tasadduq:
A CMOS low power current-mode polyphase filter.
75-80
- P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal:
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination.
81-86
- Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi:
Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories.
87-92
Dynamic thermal management
Design contest
Power optimization
- Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin:
Frequency and yield optimization using power gates in power-constrained designs.
121-126
- Andrea Calimera, Enrico Macii, Massimo Poncino:
NBTI-aware power gating for concurrent leakage and aging optimization.
127-132
- Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich:
The opportunity cost of low power design: a case study in circuit tuning.
133-138
- Jason Cong, Bin Liu, Zhiru Zhang:
Behavior-level observability don't-cares and application to low-power behavioral synthesis.
139-144
Special session 1:
green data centers
Keynote address 2
- Kevin Zhang:
Circuit design in nano-scale CMOS era: opportunities & challenges.
157-158
Micro-architecture techniques
- Jianwei Dai, Lei Wang:
Way-tagged cache: an energy-efficient L2 cache architecture under write-through policy.
159-164
- Mrinmoy Ghosh, Emre Özer, Simon Ford, Stuart Biles, Hsien-Hsin S. Lee:
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.
165-170
- Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev:
Energy-efficient renaming with register versioning.
171-176
- Noriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura:
Cooperative shared resource access control for low-power chip multiprocessors.
177-182
- Hui Zeng, Matt T. Yourst, Kanad Ghose:
An energy-efficient checkpointing mechanism for out of order commit processor.
183-188
Variation-aware and adaptive power management
Digital low-power potpourri
- Mackenzie R. Scott, Rajeevan Amirtharajah:
Pulse width modulation for reduced peak power full-swing on-chip interconnect.
213-218
- Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw:
Low power circuit design based on heterojunction tunneling transistors (HETTs).
219-224
- Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard:
A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications.
225-230
- Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon:
A low power 3D integrated FFT engine using hypercube memory division.
231-236
- Wei Xu, Jibang Liu, Tong Zhang:
Data manipulation techniques to reduce phase change memory write energy.
237-242
Energy-aware client-server computing
- Gaurav Dhiman, Giacomo Marchetti, Tajana Rosing:
vGreen: a system for energy efficient computing in virtualized environments.
243-248
- Sushu Zhang, Karam S. Chatha, Goran Konjevod:
Near optimal battery-aware energy management.
249-254
- Xia Zhao, Yao Guo, Xiangqun Chen:
Transaction-based adaptive dynamic voltage scaling for interactive applications.
255-260
- Justin Meza, Mehul A. Shah, Parthasarathy Ranganathan, Mike Fitzner, Judson Veazey:
Tracking the power in an enterprise decision support system.
261-266
- Karthik Kumar, Yamini Nimmagadda, Yung-Hsiang Lu:
Ranking servers based on energy savings for computation offloading.
267-272
Special session 2:
green computing
- Kiyoo Itoh:
Leakage- and variability-conscious circuit designs for the 0.5-v nanoscale CMOS era.
273-274
- Al Fazio:
Non volatile memories to enable system power scaling.
275-276
- Suman Datta:
Low voltage tunnel transistor architecture and its viability for energy efficient logic applications.
277-278
Poster session
- Flavio Carbognani, Luca Henzen:
Cross-over current suppressing latch compared to state-of-the-art for low-power low-frequency applications with resonant clocking.
279-282
- Sherief Reda, Aung Si, R. Iris Bahar:
Reducing the leakage and timing variability of 2D ICcs using 3D ICs.
283-286
- Ge Chen, Saeid Nooshabadi, Steven G. Duvall:
An optimization strategy for low energy and high performance for the on-chip interconnect signalling.
287-290
- Zheng Li, Jie Wu, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun:
A high-performance low-power nanophotonic on-chip network.
291-294
- Guangyu Sun, Xiaoxia Wu, Yuan Xie:
Exploration of 3D stacked L2 cache design for high performance and efficient thermal control.
295-298
- Shu-Yi Wong, Chunhong Chen, Q. M. Jonathan Wu:
Power-management-based Chien search for low power BCH decoder.
299-302
- Veera Papirla, Aarul Jain, Chaitali Chakrabarti:
Low power robust signal processing.
303-306
- Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke:
Enabling ultra low voltage system operation by tolerating on-chip cache failures.
307-310
- Lou Jiana, Wu Xiaobo:
Design of multi-mode 4-switch buck-boost controller.
311-314
- Aida Todri, Malgorzata Marek-Sadowska:
Electromigration study of power-gated grids.
315-318
- Dominic Maurath, Charalambos M. Andreou, Yiannos Manoli:
A novel 0.5 V 15 µW 1.3 MHz temperature-compensated analog PWM-controller for switch-mode converters.
323-326
- Joseph Nayfach-Battilana, Jose Renau:
SOI, interconnect, package, and mainboard thermal characterization.
327-330
- Yousra Alkabani, Farinaz Koushanfar, Miodrag Potkonjak:
N-version temperature-aware scheduling and binding.
331-334
- Seungrok Jung, Jungsoo Kim, Sangkwon Na, Chong-Min Kyung:
Energy-aware instruction-set customization for real-time embedded multiprocessor systems.
335-338
- Mian Dong, Yung-Seok Kevin Choi, Lin Zhong:
Power-saving color transformation of mobile graphical user interfaces on OLED-based displays.
339-342
- Jongmin Lee, Soontae Kim:
An energy-delay efficient 2-level data cache architecture for embedded system.
343-346
- Se Hun Kim, Saibal Mukhopadhyay, Wayne Wolf:
Experimental analysis of sequence dependence on energy saving for error tolerant image processing.
347-350
- Yuwen Sun, Shimeng Huang, Joseph Oresko, John Krais, Allen C. Cheng:
A programmable implementation of neural signal processing on a smartdust for brain-computer interfaces.
351-354
- Sonali Chouhan, M. Balakrishnan, Ranjan Bose:
An experimental validation of system level design space exploration methodology for energy efficient sensor nodes.
355-358
Panel
Keynote address 3
- Mojy Chian:
Challenges and opportunities in low-power design enablement.
361-362
Keynote address 4
- Yankin Tanurhan:
Dealing with disaggregation in ever-changing world of semiconductors.
363-364
Low-power platforms and circuits
- Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, Hoi-Jun Yoo:
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management.
365-370
- Michael J. Lyons, David Brooks:
The design of a bloom filter hardware accelerator for ultra low power systems.
371-376
- Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, Daniel J. Sorin:
Dynamic power gating with quality guarantees.
377-382
- Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger:
End-to-end validation of architectural power models.
383-388
- Satendra Kumar Maurya, Lawrence T. Clark:
Low power fast and dense longest prefix match content addressable memory for IP routers.
389-394
- Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency.
395-400
Energy-efficient wireless systems
Embedded tutorial 1
Embedded tutorial 2
Embedded tutorial 3
Embedded tutorial 4
- Vijay Raghunathan:
Green at the micro-scale: towards self-powered embedded systems.
431-432
Last update Wed May 23 01:00:40 2012
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