29. ISMVL 1999: Freiburg im Breisgau, Germany

Invited Address

• Toshio Baba:
  Development of Quantum Functional Devices for Multiple-Valued Logic Circuits. 2-8
  

Algebra I

• Michel Serfati:
  Multivalued Binary Relations and Post Algebras. 10-17
  
• Radomir S. Stankovic, Dejan Milenovic, Dragan Jankovic:
  Quaternion Groups versus Dyadic Groups in Representations and Processing of Switching Functions. 18-23
  
• Szymon Jaroszewicz, Dan A. Simovici:
  On Axiomatization of Conditional Entropy of Functions Between Finite Sets. 24-28
  

Circuits I

• Takahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama:
  Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs. 30-35
  
• Claudio Moraga, Ralph Heider:
  "New lamps for old!" (Generalized Multiple-valued Neurons). 36-41
  
• Edgar "Dan" Olson:
  Supplementary Symmetrical Logic Circuit Structure. 42-47
  

Decomposition

• Bernd Steinbach, Marek A. Perkowski, Christian Lang:
  Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications. 50-58
  
• Tsutomu Sasao:
  Totally Undecomposable Functions: Applications to Efficient Multiple-Valued Decompositions. 59-65
  
• J. J. Lou, Janusz A. Brzozowski:
  A Generalization of Shestakov's Function Decomposition Method. 66-71
  

Clones

• Ivo G. Rosenberg, Hajime Machida:
  Gigantic Pairs of Minimal Clones. 74-79
  
• Lucien Haddad, Jean Fugère:
  Maximal Chains of Partial Clones Containing All Idempotent Partial Functions. 80-84
  
• Lucien Haddad, Dietlinde Lau:
  Partial Clones and their Generating Sets. 85-90
  

Logic Design

• Elena Dubrova:
  Evaluation of m-Valued Fixed Polarity Generalizations of Reed-Muller Canonical Form. 92-98
  
• Debatosh Debnath, Tsutomu Sasao:
  Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates. 99-104
  
• Takahiro Hozumi, Osamu Kakusho, Yutaka Hata:
  The Output Permutation for the Multiple-Valued Logic Minimization with Universal Literals. 105-109
  
• Noboru Takagi, Akimitsu Hon-nami, Kyoichi Nakashima:
  Logical Model for Representing Uncertain Statuses of Multiple-Valued Logic Systems Realized by Min, Max and Literals. 110-115
  

Algebra II

• Gerhard W. Dueck, Mou Hu, Blair Fraser:
  A Super Switch Algebra for Quantum Device Based Systems. 118-124
  
• Tomoko Ninomiya, Masao Mukaidono:
  Clarifying the Axioms of Kleene Algebra based on the Method of Indeterminate Coefficients. 125-130
  
• Grant Pogosyan:
  The Number of Cascade Functions. 131-135
  
• Renren Liu:
  Research on the Similarity among Precomplete Sets Preserving m-ary Relations in Partial K-Valued Logic. 136-139
  

Invited Address

• Abdelwaheb Ayari, David A. Basin, Stefan Friedrich:
  Structural and Behavioral Modeling with Monadic Logics. 142-151
  

Decision Diagrams

• Radomir S. Stankovic:
  Matrix-Valued EXOR-TDDs in Decompositon of Switching Functions. 154-159
  
• Mostafa H. Abd-El-Barr, Henry Fernandes:
  Synthesis of Multiple-Valued Decision Diagrams using Current-Mode CMOS Circuits. 160-165
  
• Hafiz Md. Hasan Babu, Tsutomu Sasao:
  Shared Multiple-Valued Decision Diagrams for Multiple-Output Functions. 166-172
  

Circuits II

• Andreas Herrfeld, Siegbert Hentschke:
  Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead. 174-179
  
• Jing Shen, Koichi Tanno, Okihiko Ishizuka:
  Down Literal Circuit with Neuron-MOS Transistors and Its Applications. 180-185
  
• Aryan Saed, Majid Ahmadi, Graham A. Jullien:
  Arithmetic Circuits for Analog Digits. 186-191
  

Applications

• Kai Freitag, Lars Hildebrand, Claudio Moraga:
  Quaternary Coded Genetic Algorithms. 194-199
  
• Takafumi Aoki, Ken-ichi Hoshi, Tatsuo Higuchi:
  Redundant Complex Arithmetic and Its Application to Complex Multiplier Design. 200-207
  
• Alioune Ngom, Ivan Stojmenovic, Jovisa D. Zunic:
  On the Number of Multilinear Partitions and the Computing Capacity of Multiple-Valued Multiple-Threshold Perceptrons. 208-213
  
• Yasunori Nagata, D. Michael Miller, Masao Mukaidono:
  B-ternary Logic Based Asynchronous Micropipeline. 214-219
  
• K. J. Adams, J. G. Campbell, Liam P. Maguire, J. A. C. Webb:
  State Assignment Techniques in Multiple-Valued Logic. 220-225
  

Logic

• Lech Józwiak:
  Information Relationships and Measures in Application to Logic Design. 228-235
  
• Thomas Lukasiewicz:
  Probabilistic and Truth-Functional Many-Valued Logic Programming. 236-241
  
• Viorica Sofronie-Stokkermans:
  Representation Theorems and Theorem Proving in Non-Classical Logics. 242-247
  
• Bernhard Beckert, Reiner Hähnle, Felip Manyà:
  Transformations between Signed and Classical Clause Logic. 248-255
  
• Masahiro Miyakawa:
  Semirigid Problems in k-Valued Logic. 256-260
  

Testing

• Mostafa H. Abd-El-Barr, Maher Al-Sherif, Mohamed Osman:
  Fault Characterization and Testability Considerations in Multi-Valued Logic Circuits. 262-267
  
• Ugur Kalay, Marek A. Perkowski, Douglas V. Hall:
  Highly Testable Boolean Ring Logic Circuits. 268-274
  
• Takahiro Hanyu, Tsukasa Ike, Michitaka Kameyama:
  Self-Checking Multiple-Valued Circuit Based on Dual-Rail Current-Mode Differential Logic. 275-279
  

Fuzzy Logic

• Helmut Thiele:
  On the Concept of Qualitative Fuzzy Set. 282-287
  
• Yutaka Hata, Masao Mukaidono:
  On Some Classes of Fuzzy Information Granularity and Their Representations. 288-293
  
• Liam P. Maguire, T. Martin McGinnity, L. J. McDaid:
  From a Fuzzy Flip-Flop to a MVL Flip-Flop. 294-299