LCPC 2005: Hawthorne, New York, USA

• Keith D. Cooper, Anshuman Dasgupta, Jason Eckhardt:
  Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms. 1-16
  
• Alban Douillet, Guang R. Gao:
  Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design. 17-31
  
• Shashi Deepa Arcot, Henry G. Dietz, Sarojini Priyadarshini Rajachidambaram:
  Manipulating MAXLIVE for Spill-Free Register Allocation. 32-46
  
• Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Roy Ju:
  Optimizing Packet Accesses for a Domain Specific Language on Network Processors. 47-61
  
• Heidi E. Ziegler, Priyadarshini L. Malusare, Pedro C. Diniz:
  Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures. 62-75
  
• David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee:
  Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code. 76-90
  
• Qing Yi:
  Applying Data Copy to Improve Memory Performance of General Array Computations. 91-105
  
• Apan Qasem, Ken Kennedy:
  A Cache-Conscious Profitability Model for Empirical Tuning of Loop Fusion. 106-120
  
• Xiaoming Li, María Jesús Garzarán:
  Optimizing Matrix Multiplication with a Classifier Learning System. 121-135
  
• Sébastien Donadio, James C. Brodman, Thomas Roeder, Kamen Yotov, Denis Barthou, Albert Cohen, María Jesús Garzarán, David A. Padua, Keshav Pingali:
  A Language for the Compact Representation of Multiple Program Versions. 136-151
  
• Rajkishore Barik:
  Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java Programs. 152-169
  
• Chi-Leung Wong, Zehra Sura, Xing Fang, Kyungwoo Lee, Samuel P. Midkiff, Jaejin Lee, David A. Padua:
  Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware Compiler. 170-184
  
• Amir Kamil, Katherine A. Yelick:
  Concurrency Analysis for Parallel Programs with Textually Aligned Barriers. 185-199
  
• Kaushik Datta, Dan Bonachea, Katherine A. Yelick:
  Titanium Performance and Potential: An NPB Experimental Study. 200-214
  
• Xiaoyang Gao, Sriram Krishnamoorthy, Swarup Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
  Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations. 215-229
  
• Kamen Yotov, Sandra Jackson, Tyler Steele, Keshav Pingali, Paul Stodghill:
  Automatic Measurement of Instruction Cache Capacity. 230-243
  
• Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye:
  Combined ILP and Register Tiling: Analytical Model and Optimization Framework. 244-258
  
• Arkady Epshteyn, María Jesús Garzarán, Gerald DeJong, David A. Padua, Gang Ren, Xiaoming Li, Kamen Yotov, Keshav Pingali:
  Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization. 259-273
  
• Alberto de la Encina, Ismael Rodríguez, Fernando Rubio:
  Testing Speculative Work in a Lazy/Eager Parallel Functional Language. 274-288
  
• Shengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Antonia Zhai, Pen-Chung Yew:
  Loop Selection for Thread-Level Speculation. 289-303
  
• Christopher J. F. Pickett, Clark Verbrugge:
  Software Thread Level Speculation for the Java Language and Virtual Machine Environment. 304-318
  
• Shuo Yang, Ali Raza Butt, Y. Charlie Hu, Samuel P. Midkiff:
  Lightweight Monitoring of the Progress of Remotely Executing Computations. 319-333
  
• Florian T. Schneider, Thomas R. Gross:
  Using Platform-Specific Performance Counters for Dynamic Compilation. 334-346
  
• Karen Osmond, Olav Beckmann, Tony Field, Paul H. J. Kelly:
  A Domain-Specific Interpreter for Parallelizing a Large Mixed-Language Visualisation Application. 347-361
  
• Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara:
  Compiler Control Power Saving Scheme for Multi Core Processors. 362-376
  
• Xiaogang Li, Gagan Agrawal:
  Code Transformations for One-Pass Analysis. 377-396
  
• Silvius Rus, Guobin He, Lawrence Rauchwerger:
  Scalable Array SSA and Array Data Flow Analysis. 397-412
  
• Hansang Bae, Rudolf Eigenmann:
  Interprocedural Symbolic Range Propagation for Optimizing Compilers. 413-424
  
• Xipeng Shen, Chen Ding:
  Parallelization of Utility Programs Based on Behavior Phase Analysis. 425-432
  
• Chun Chen, Jacqueline Chame, Mary W. Hall, Kristina Lerman:
  A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization. 433-440
  
• Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos:
  An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers. 441-449
  
• Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhary:
  Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications. 450-457
  
• Bjarne Stroustrup, Gabriel Dos Reis:
  Supporting SELL for High-Performance Computing. 458-465
  
• Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee:
  Compiler Supports and Optimizations for PAC VLIW DSP Processors. 466-474
  

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