LCTES-SCOPES 2002: Berlin, Germany

Welcome and Opening Remarks

• Philippe Magarshack:
  Systems-on-chip needs for embedded software development: an industrial perspective. 1
  
• Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer:
  Energy-conscious compilation based on voltage scaling. 2-11
  

Synthesis and Design Space Exploration

• Hyunok Oh, Soonhoi Ha:
  Fractional rate dataflow model and efficient code synthesis for multimedia applications. 12-17
  
• Sumit Mohanty, Viktor K. Prasanna, Sandeep Neema, James R. Davis:
  Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation. 18-27
  
• Krishna V. Palem, Rodric M. Rabbah, Vincent John Mooney, Pinar Korkmaz, Kiran Puttaswamy:
  Design space optimization of embedded memory systems via data remapping. 28-37
  

Management and Compilation Tasks

• Frank Hunleth, Ron Cytron:
  Footprint and feature management using aspect-oriented programming techniques. 38-45
  
• Daniel Kästner, Stephan Wilhelm:
  Generic control flow reconstruction from assembly code. 46-55
  
• Arvind Krishnaswamy, Rajiv Gupta:
  Profile guided selection of ARM and thumb instructions. 56-64
  

Debugging and Validation

• Takayuki Wakabayashi, Hiroaki Takada:
  Standardization approach of ITRON debugging interface specification and evaluation of its adaptability. 65-74
  
• Arshad Jhumka, Martin Hiller, Vilgot Claesson, Neeraj Suri:
  On systematic design of globally consistent executable assertions in embedded software. 75-84
  
• Xiushan Feng, Alan J. Hu:
  Automatic formal verification for scheduled VLIW code. 85-92
  

Session 5

• Gerhard Fettweis:
  DSPs: why don't they just go away!. 93-93
  
• Markus Lorenz, Lars Wehmeyer, Thorsten Dräger:
  Energy aware compilation for DSPs with SIMD instructions. 94-101
  

Code Generation

• Christoph W. Keßler, Andrzej Bednarski:
  Optimal integrated code generation for clustered VLIW architectures. 102-111
  
• Yi Qian, Steve Carr, Philip H. Sweany:
  Loop fusion for clustered VLIW architectures. 112-119
  
• Mayur Naik, Jens Palsberg:
  Compiling with code-size constraints. 120-129
  

Register Allocation

• Jeonghun Cho, Yunheung Paek, David B. Whalley:
  Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms. 130-138
  
• Bernhard Scholz, Erik Eckstein:
  Register allocation for irregular architectures. 139-148
  
• Volker Barthelmann:
  Inter-task register-allocation for static operating systems. 149-154
  

Code Optimizing and Processor Modeling

• Wankang Zhao, Baosheng Cai, David B. Whalley, Mark W. Bailey, Robert van Engelen, Xin Yuan, Jason Hiser, Jack W. Davidson, Kyle Gallivan, Douglas L. Jones:
  VISTA: a system for interactive code improvement. 155-164
  
• Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang:
  Compiler-directed cache polymorphism. 165-174
  
• Christopher W. Milner, Jack W. Davidson:
  Quick piping: a fast, high-level model for describing processor pipelines. 175-184
  

Codesign and Compilation

• Oliver Wahlen, Tilman Glökler, Achim Nohl, Andreas Hoffmann, Rainer Leupers, Heinrich Meyr:
  Application specific compiler/architecture codesign: a case study. 185-193
  
• Jeffrey Palm, Han Bok Lee, Amer Diwan, J. Eliot B. Moss:
  When to use a compilation service? 194-203
  
• Matt Newsome, Des Watson:
  Proxy compilation of dynamically loaded Java classes with MoJo. 204-212
  

Real-Time Scheduling

• Ajay Dudani, Frank Mueller, Yifan Zhu:
  Energy-conserving feedback EDF scheduling for embedded systems with real-time constraints. 213-222
  
• Saehwa Kim, Seongsoo Hong, Tae-Hyung Kim:
  Perfecting preemption threshold scheduling for object-oriented real-time system design: from the perspective of real-time synchronization. 223-232
  

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