LCTES 2007: San Diego, California, USA

Reliability

• Pratibha Permandla, Michael Roberson, Chandrasekhar Boyapati:
  A type system for preventing data races and deadlocks in the java virtual machine language: 1. 10
  
• Tai-Yi Huang, Pin-Chuan Chou, Cheng-Han Tsai, Hsin-An Chen:
  Automated fault localization with statistically suspicious program states. 11-20
  

Dynamic voltage scaling

• Xiliang Zhong, Cheng-Zhong Xu:
  Frequency-aware energy optimization for real-time periodic and aperiodic tasks. 21-30
  
• Yifan Zhu, Frank Mueller:
  DVSleak: combining leakage reduction and voltage scaling in feedback EDF scheduling. 31-40
  
• Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Rusu, Ruibin Xu, Frank Liberato, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
  Integrated CPU and l2 cache voltage scaling using machine learning. 41-50
  

Embedded Java

• Joshua S. Auerbach, David F. Bacon, Daniel T. Iercan, Christoph M. Kirsch, V. T. Rajan, Harald Röck, Rainer Trummer:
  Java takes flight: time-portable real-time programming with exotasks. 51-62
  
• SungHyun Hong, Jin-Chul Kim, Jin Woo Shin, Soo-Mook Moon, Hyeong-Seok Oh, Jaemok Lee, Hyung-Kyu Choi:
  Java client ahead-of-time compiler for embedded systems. 63-72
  

Source-level analysis

• Christophe Alias, Fabrice Baray, Alain Darte:
  Bee+Cl@k: an implementation of lattice-based array contraction in the source-to-source translator rose. 73-82
  
• Richard Vincent Bennett, Alastair Colin Murray, Björn Franke, Nigel P. Topham:
  Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems. 83-92
  

Register and memory management

• Minwook Ahn, Jooyeon Lee, Yunheung Paek:
  Optimistic coalescing for heterogeneous register architectures. 93-102
  
• Florent Bouchez, Alain Darte, Fabrice Rastello:
  On the complexity of spill everywhere under SSA form. 103-112
  
• Weifeng Xu, Russell Tessier:
  Tetris: a new register pressure control technique for VLIW processors. 113-122
  
• Filip Pizlo, Antony L. Hosking, Jan Vitek:
  Hierarchical real-time garbage collection. 123-133
  

Invited speakers

• Kathryn M. O'Brien:
  Issues and challenges in compiling for the CBEA. 134
  
• Daniel Kästner:
  Safe worst-case execution time analysis by abstract interpretation of executable code. 135
  
• Jonathan Engelsma:
  Enabling seamless mobility: an enablers, experiences and tools perspective. 136
  

Poster exhibit summaries

• Po-Kuan Huang, Matin Hashemi, Soheil Ghiasi:
  Joint throughput and energy optimization for pipelined execution of embedded streaming applications. 137-139
  
• Hansu Cho, Samar Abdi, Daniel Gajski:
  Interface synthesis for heterogeneous multi-core systems from transaction level models. 140-142
  
• Ines Viskic, Samar Abdi, Daniel D. Gajski:
  Automatic generation of embedded communication SW for heterogeneous MPSoC platforms. 143-145
  
• Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee:
  Enabling compiler flow for embedded VLIW DSP processors with distributed register files. 146-148
  
• Karsten Walther, René Herzog, Jörg Nolte:
  Analyzing the real-time behaviour of deeply embedded event driven systems. 149-151
  
• Joel Coffman, Christopher A. Healy, Frank Mueller, David B. Whalley:
  Generalizing parametric timing analysis. 152-154
  
• Guangyu Chen, Feihui Li, Mahmut T. Kandemir:
  Compiler-directed application mapping for NoC based chip multiprocessors. 155-157
  
• Shan Yan, Bill Lin:
  Stream execution on wide-issue clustered VLIW architectures. 158-160
  
• Michael L. Chu, Scott A. Mahlke:
  Code and data partitioning for fine-grain parallelism. 161-164
  

Instruction cache

• Stephen Roderick Hines, Gary S. Tyson, David B. Whalley:
  Addressing instruction fetch bottlenecks by using an instruction register file. 165-174
  
• Jun Yan, Wei Zhang:
  WCET analysis of instruction caches with prefetching. 175-184
  

Memory systems

• Ke Ning, David R. Kaeli:
  External memory page remapping for embedded multimedia systems. 185-194
  
• Hyungmin Cho, Bernhard Egger, Jaejin Lee, Heonshik Shin:
  Dynamic data scratchpad memory management for a memory subsystem with an MMU. 195-206
  
• Lian Li, Quan Hoang Nguyen, Jingling Xue:
  Scratchpad allocation for data aggregates in superperfect graphs. 207-216
  
• Jihyun In, Ilhoon Shin, Hyojun Kim:
  SWL: a search-while-load demand paging scheme with NAND flash memory. 217-226
  

Data cache

• Qin Wang, Junpu Chen, Weihua Zhang, Min Yang, Binyu Zang:
  Optimizing software cache performance of packet processing applications. 227-236
  
• Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlke:
  Compiler-managed partitioned data caches for low power. 237-247