41. MICRO 2008: Lake Como, Italy

Keynote 1

Instruction-Level Parallelism

Cache Coherence and Cache Modeling

Cache Architectures for Security and Availability

Reliability, Availability, Security

Embedded and Special Purpose Architectures

Memory and Cache Architectures

Transactions and Runtime Systems

Modeling, Simulation and Verification

Multicore and Multithreading

Interconnects

Process Variation

Circuits and Microarchitectures