4. PACS 2004: Portland, OR, USA
Babak Falsafi, T. N. Vijaykumar (Eds.): Power-Aware Computer Systems, 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers. Springer 2005 Lecture Notes in Computer Science ISBN 3-540-29790-1
Microarchitecture- and Circuit-Level Techniques
- Miquel Pericàs, Rubén González, Adrián Cristal, Alexander V. Veidenbaum, Mateo Valero: An Optimized Front-End Physical Register File with Banking and Writeback Filtering. 1-14
- Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin: Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. 15-29
- Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal: Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors. 30-45
- Eren Kursun, Glenn Reinman, Suleyman Sair, Anahita Shayesteh, Timothy Sherwood: Low-Overhead Core Swapping for Thermal Management. 46-60
Power-Aware Memory and Interconnect Systems
- Hai Huang, Kang G. Shin, Charles Lefurgy, Karthick Rajamani, Tom W. Keller, Eric Van Hensbergen, Freeman L. Rawson III: Software-Hardware Cooperative Power Management for Main Memory. 61-77
- Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz: Energy-Aware Data Prefetching for General-Purpose Programs. 78-94
- Ke Ning, David R. Kaeli: Bus Power Estimation and Power-Efficient Bus Arbitration for System-on-a-Chip Embedded Systems. 95-106
Frequency-/Voltage-Scaling Techniques
- Masaaki Kondo, Hiroshi Nakamura: Dynamic Processor Throttling for Power Efficient Computations. 120-134
- Chung-Hsing Hsu, Wu-chun Feng: Effective Dynamic Voltage Scaling Through CPU-Boundedness Detection. 135-149
- Mark E. Femal, Vincent W. Freeh: Safe Overprovisioning: Using Power Limits to Increase Aggregate Throughput. 150-164
- Erratum.
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