16. PATMOS 2006: Montpellier, France

High-Level Design

Power Estimation / Modeling

Memory and Register Files

Low-Power Digital Circuits

Busses and Interconnects

Low Power Techniques

Applications and SoC Design

Modeling

Digital Circuits

Reconfigurable and Programmable Devices

Poster 1

Poster 2

Poster 3

Keynotes

Industrial Session