ReCoSoC 2007:
Montpellier,
France
Gilles Sassatelli, Manfred Glesner, Christophe Bobda, Pascal Benoit (Eds.):
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007.
Univ. Montpellier II 2007, ISBN 2-9517461-3-X 
Session 1. Low Power / Ansynchronous ReCoSoC Platforms
- Katarina Paulsson, Michael Hübner, Salih Bayar, Jürgen Becker:
Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems.
1-6
- Tudor Murgan, Andre Guntoro, Heiko Hinkelmann, Petru Bogdan Bacinschi, Manfred Glesner:
Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling.
7-14
- Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Alin Razafindraibe, Taha Beyrouthy, Laurent Fesquet:
A Reconfigurable Cell for a Multi-Style Asynchronous FPGA.
15-22
Session 2. Self-Adaptive Systems
- Leandro Möller, Ismael Grehs, Ewerson Carvalho, Rafael Soares, Ney Calazans, Fernando Moraes:
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems.
23-30
- Marcelo Götz, Tao Xie, Florian Dittmann:
Dynamic Relocation of Hybrid Tasks: A Complete Design Flow.
31-38
- Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
HS Scale: A run-time adaptable MP-SoC architecture.
39-46
- Kurt Franz Ackermann, Leandro Soares Indrusiak, Manfred Glesner:
System Level Design of a Dynamically Self-Reconfigurable Image Processing System.
47-54
Session 3. Processors and Multiprocessors in Embedded Systems
- Peter Zipf, Heiko Hinkelmann, Felix Missel, Manfred Glesner:
A Customizable LEON2-Based VLIW Processor.
55-60
- Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier:
Massively Parallel Processor Architectures: A Co-design Approach.
61-68
- Mehdi Jallouli, Camille Diou, Fabrice Monteiro:
Stack processor architecture and development methods suitable for dependable applications.
69-75
Session 4. Mapping and Programming Models
Session 5. NOC Architectures
Session 6. Test and Verification in ReCoSoC Platforms
Session 7. Security Issues in ReCoSoC Platforms
- Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
A Dependable Parallel Architecture for SBoxes.
132-137
- Eduardo Wanderley Netto, Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet:
IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking.
138-145
- Romain Vaslin, Guy Gogniat, Eduardo Wanderley Netto, Russell Tessier, Wayne P. Burleson:
Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory.
146-153
- Alberto Ferrante, Antonio Vincenzo Taddeo, Mariagiovanna Sami, Fabrizio Mantovani, Jurijs Fridkins:
Self-adaptive Security at Application Level: a Proposal.
154-160
Session 8. Applications in ReCoSoC Systems
- Hervé Berviller, Vincent Frick, Philippe Bougeot, Jean-Philippe Blonde, Julien Oster, Jacques Felbinger:
FPGA Implemenatation of an Adaptive Filtering: Application on ECG Signal Artefact Suppression in MRI Environment.
161-165
- Fabio Garzia, Claudio Brunelli, Andrea Ferro, Jari Nurmi:
Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device.
166-170
- Jose Alberto Vite-Frias, René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno, Jesus Rooney Rivera-Guillen, Arturo Garcia-Perez:
Special Purpose Multi-processor for On-line Fault Detection on Induction Motors during Steady State.
171-176
Session 9. Design of Reconfigurable Architectures
Posters and Interactive Presentations
Copyright © Tue Nov 10 00:07:18 2009
by Michael Ley (ley@uni-trier.de)
